<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/xtensa/include/asm/traps.h, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2023-06-14T04:56:27Z</updated>
<entry>
<title>xtensa: add load/store exception handler</title>
<updated>2023-06-14T04:56:27Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2023-06-13T23:51:18Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f29cf77609cc401d28e2e7ec5c57d9d178ef347d'/>
<id>urn:sha1:f29cf77609cc401d28e2e7ec5c57d9d178ef347d</id>
<content type='text'>
Memory attached to instruction bus of the xtensa CPU is only accessible
for a limited subset of opcodes. Other opcodes generate an exception
with the load/store error cause code. This property complicates use of
such systems. Provide a handler that recognizes and transparently fixes
such exceptions. The following opcodes are recognized when used outside
of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: move early_trap_init from kasan_early_init to init_arch</title>
<updated>2023-06-14T04:56:27Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2023-06-14T02:56:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=67e886229e27e80253e1ff9025a74a3dce941f17'/>
<id>urn:sha1:67e886229e27e80253e1ff9025a74a3dce941f17</id>
<content type='text'>
There may be other users for the early traps besides KASAN. Move call to
the early_trap_init from kasan_early_init. Protect init_exc_table
initializer with ifdef to make sure it builds on noMMU configurations.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: support coprocessors on SMP</title>
<updated>2022-05-02T02:51:23Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2022-04-15T10:05:31Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=11e969bc964a0e50ae64cdba092048e3937d2389'/>
<id>urn:sha1:11e969bc964a0e50ae64cdba092048e3937d2389</id>
<content type='text'>
Current coprocessor support on xtensa only works correctly on
uniprocessor configurations. Make it work on SMP too and keep it lazy.

Make coprocessor_owner array per-CPU and move it to struct exc_table for
easy access from the fast_coprocessor exception handler. Allow task to
have live coprocessors only on single CPU, record this CPU number in the
struct thread_info::cp_owner_cpu. Change struct thread_info::cpenable
meaning to be 'coprocessors live on cp_owner_cpu'.
Introduce C-level coprocessor exception handler that flushes and
releases live coprocessors of the task taking 'coprocessor disabled'
exception and call it from the fast_coprocessor handler when the task
has live coprocessors on other CPU.
Make coprocessor_flush_all and coprocessor_release_all work correctly
when called from any CPU by sending IPI to the cp_owner_cpu. Add
function coprocessor_flush_release_all to do flush followed by release
atomically. Add function local_coprocessors_flush_release_all to flush
and release all coprocessors on the local CPU and use it to flush
coprocessor contexts from the CPU that goes offline.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up excsave1 initialization</title>
<updated>2022-05-02T02:51:22Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2022-04-15T09:59:33Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9fa8c59f5f82aec99a7f87095ab093b68dd492a5'/>
<id>urn:sha1:9fa8c59f5f82aec99a7f87095ab093b68dd492a5</id>
<content type='text'>
Use xtensa_set_sr instead of inline assembly.
Rename local variable exc_table in early_trap_init to avoid conflict
with per-CPU variable of the same name.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up exception handler prototypes</title>
<updated>2022-05-02T02:51:22Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2022-04-21T09:35:23Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fc55402b84385bdb907c24f891e3e5df464f027c'/>
<id>urn:sha1:fc55402b84385bdb907c24f891e3e5df464f027c</id>
<content type='text'>
Exception handlers are currently passed as void pointers because they
may have one or two parameters. Only two handlers uses the second
parameter and it is available in the struct pt_regs anyway. Make all
handlers have only one parameter, introduce xtensa_exception_handler
type for handlers and use it in trap_set_handler.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up function declarations in traps.c</title>
<updated>2022-05-02T02:51:22Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2022-04-15T09:47:04Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=db0d07fa192a3c05776875f4a851588d7dfc9f96'/>
<id>urn:sha1:db0d07fa192a3c05776875f4a851588d7dfc9f96</id>
<content type='text'>
Drop 'extern' from all function declarations and move those that need to
be visible from traps.c to traps.h. Add 'asmlinkage' to declarations of
fucntions defined in assembly. Add 'static' to declarations and
definitions only used locally. Add argument names in declarations.
Drop unused second argument from do_multihit and do_page_fault.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: only build windowed register support code when needed</title>
<updated>2021-10-19T05:19:35Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2021-07-26T14:32:55Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=da0a4e5c8fbcce3d1afebf9f2a967083bb19634d'/>
<id>urn:sha1:da0a4e5c8fbcce3d1afebf9f2a967083bb19634d</id>
<content type='text'>
There's no need in window overflow/underflow/alloca exception handlers
or window spill code when neither kernel nor userspace support windowed
registers. Don't build or link it.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: drop unused field from the struct exc_table</title>
<updated>2018-12-03T09:39:22Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2018-11-16T03:38:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=44ba57a23cde862dfd98c65fb2cfa0affc05a9ad'/>
<id>urn:sha1:44ba57a23cde862dfd98c65fb2cfa0affc05a9ad</id>
<content type='text'>
exc_table::syscall_save and corresponding macro EXC_TABLE_SYSCALL_SAVE
have never been used by the xtensa code. Drop them.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: implement early_trap_init</title>
<updated>2017-12-17T06:37:09Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2017-12-16T00:20:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=501c26e82df8d253851b80082778eeb37e4bab5c'/>
<id>urn:sha1:501c26e82df8d253851b80082778eeb37e4bab5c</id>
<content type='text'>
Paging on xtensa architecture requires functioning exception handling
because hardware cannot transparently access page tables that are not
currently mapped by TLB. Exception handling is set up late in the
initialization process, but working paging is needed for KASAN.

Provide early_trap_init that sets up minimal exception handling
sufficient for KASAN to work.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up exception handling structure</title>
<updated>2017-12-17T06:37:09Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2017-12-16T00:08:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f21a79cab3773bc17aa845b7738c7f200778a260'/>
<id>urn:sha1:f21a79cab3773bc17aa845b7738c7f200778a260</id>
<content type='text'>
Instead of using flat array of longs use normal C structure and generate
EXC_TABLE_* constants in the asm-offsets.c

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
</feed>
