<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/x86/include/asm/hyperv-tlfs.h, branch linux-5.14.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.14.y</id>
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<updated>2021-06-17T17:09:36Z</updated>
<entry>
<title>hyperv: SVM enlightened TLB flush support flag</title>
<updated>2021-06-17T17:09:36Z</updated>
<author>
<name>Vineeth Pillai</name>
<email>viremana@linux.microsoft.com</email>
</author>
<published>2021-06-03T15:14:35Z</published>
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<id>urn:sha1:32431fb2538df56693a5852a50013549c827f57c</id>
<content type='text'>
Bit 22 of HYPERV_CPUID_FEATURES.EDX is specific to SVM and specifies
support for enlightened TLB flush. With this enlightenment enabled,
ASID invalidations flushes only gva-&gt;hpa entries. To flush TLB entries
derived from NPT, hypercalls should be used
(HvFlushGuestPhysicalAddressSpace or HvFlushGuestPhysicalAddressList)

Signed-off-by: Vineeth Pillai &lt;viremana@linux.microsoft.com&gt;
Reviewed-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Message-Id: &lt;a060f872d0df1955e52e30b877b3300485edb27c.1622730232.git.viremana@linux.microsoft.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: hyper-v: Advertise support for fast XMM hypercalls</title>
<updated>2021-06-17T17:09:24Z</updated>
<author>
<name>Siddharth Chandrasekaran</name>
<email>sidcha@amazon.de</email>
</author>
<published>2021-05-26T09:03:56Z</published>
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<id>urn:sha1:d8f5537a8816c8f00ea3103e74b65987963a56c6</id>
<content type='text'>
Now that kvm_hv_flush_tlb() has been patched to support XMM hypercall
inputs, we can start advertising this feature to guests.

Cc: Alexander Graf &lt;graf@amazon.com&gt;
Cc: Evgeny Iakovlev &lt;eyakovl@amazon.de&gt;
Signed-off-by: Siddharth Chandrasekaran &lt;sidcha@amazon.de&gt;
Message-Id: &lt;e63fc1c61dd2efecbefef239f4f0a598bd552750.1622019134.git.sidcha@amazon.de&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: x86: kvm_hv_flush_tlb use inputs from XMM registers</title>
<updated>2021-06-17T17:09:24Z</updated>
<author>
<name>Siddharth Chandrasekaran</name>
<email>sidcha@amazon.de</email>
</author>
<published>2021-05-26T08:56:10Z</published>
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<id>urn:sha1:5974565bc26d6a599189db7c0b1f79eaa9af8eb9</id>
<content type='text'>
Hyper-V supports the use of XMM registers to perform fast hypercalls.
This allows guests to take advantage of the improved performance of the
fast hypercall interface even though a hypercall may require more than
(the current maximum of) two input registers.

The XMM fast hypercall interface uses six additional XMM registers (XMM0
to XMM5) to allow the guest to pass an input parameter block of up to
112 bytes.

Add framework to read from XMM registers in kvm_hv_hypercall() and use
the additional hypercall inputs from XMM registers in kvm_hv_flush_tlb()
when possible.

Cc: Alexander Graf &lt;graf@amazon.com&gt;
Co-developed-by: Evgeny Iakovlev &lt;eyakovl@amazon.de&gt;
Signed-off-by: Evgeny Iakovlev &lt;eyakovl@amazon.de&gt;
Signed-off-by: Siddharth Chandrasekaran &lt;sidcha@amazon.de&gt;
Message-Id: &lt;fc62edad33f1920fe5c74dde47d7d0b4275a9012.1622019134.git.sidcha@amazon.de&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>Drivers: hv: Redo Hyper-V synthetic MSR get/set functions</title>
<updated>2021-03-08T17:32:59Z</updated>
<author>
<name>Michael Kelley</name>
<email>mikelley@microsoft.com</email>
</author>
<published>2021-03-02T21:38:15Z</published>
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<id>urn:sha1:f3c5e63c3690fc64e5a7a2b3e4f9f5ff1fa25584</id>
<content type='text'>
Current code defines a separate get and set macro for each Hyper-V
synthetic MSR used by the VMbus driver. Furthermore, the get macro
can't be converted to a standard function because the second argument
is modified in place, which is somewhat bad form.

Redo this by providing a single get and a single set function that
take a parameter specifying the MSR to be operated on. Fixup usage
of the get function. Calling locations are no more complex than before,
but the code under arch/x86 and the upcoming code under arch/arm64
is significantly simplified.

Also standardize the names of Hyper-V synthetic MSRs that are
architecture neutral. But keep the old x86-specific names as aliases
that can be removed later when all references (particularly in KVM
code) have been cleaned up in a separate patch series.

No functional change.

Signed-off-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Reviewed-by: Boqun Feng &lt;boqun.feng@gmail.com&gt;
Link: https://lore.kernel.org/r/1614721102-2241-4-git-send-email-mikelley@microsoft.com
Signed-off-by: Wei Liu &lt;wei.liu@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86/hyper-v: Move hv_message_type to architecture neutral module</title>
<updated>2021-03-08T17:32:59Z</updated>
<author>
<name>Michael Kelley</name>
<email>mikelley@microsoft.com</email>
</author>
<published>2021-03-02T21:38:14Z</published>
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<id>urn:sha1:5e4e6ddf8d74068fd6bb7922dabcfa2c0f506c39</id>
<content type='text'>
The definition of enum hv_message_type includes arch neutral and
x86/x64-specific values. Ideally there would be a way to put the
arch neutral values in an arch neutral module, and the arch
specific values in an arch specific module. But C doesn't provide
a way to extend enum types. As a compromise, move the entire
definition into an arch neutral module, to avoid duplicating the
arch neutral values for x86/x64 and for ARM64.

No functional change.

Signed-off-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Reviewed-by: Boqun Feng &lt;boqun.feng@gmail.com&gt;
Link: https://lore.kernel.org/r/1614721102-2241-3-git-send-email-mikelley@microsoft.com
Signed-off-by: Wei Liu &lt;wei.liu@kernel.org&gt;
</content>
</entry>
<entry>
<title>asm-generic/hyperv: import data structures for mapping device interrupts</title>
<updated>2021-02-11T08:47:06Z</updated>
<author>
<name>Wei Liu</name>
<email>wei.liu@kernel.org</email>
</author>
<published>2021-02-03T15:04:33Z</published>
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<id>urn:sha1:466a9c3f88d04152ca83e840ca940c5f700402ac</id>
<content type='text'>
Signed-off-by: Sunil Muthuswamy &lt;sunilmut@microsoft.com&gt;
Co-Developed-by: Sunil Muthuswamy &lt;sunilmut@microsoft.com&gt;
Signed-off-by: Wei Liu &lt;wei.liu@kernel.org&gt;
Reviewed-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Link: https://lore.kernel.org/r/20210203150435.27941-15-wei.liu@kernel.org
</content>
</entry>
<entry>
<title>x86/hyperv: detect if Linux is the root partition</title>
<updated>2021-02-11T08:47:05Z</updated>
<author>
<name>Wei Liu</name>
<email>wei.liu@kernel.org</email>
</author>
<published>2021-02-03T15:04:21Z</published>
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<id>urn:sha1:e997720202b363ba8000d769f114e3c2c5822227</id>
<content type='text'>
For now we can use the privilege flag to check. Stash the value to be
used later.

Put in a bunch of defines for future use when we want to have more
fine-grained detection.

Signed-off-by: Wei Liu &lt;wei.liu@kernel.org&gt;
Reviewed-by: Pavel Tatashin &lt;pasha.tatashin@soleen.com&gt;
Reviewed-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Link: https://lore.kernel.org/r/20210203150435.27941-3-wei.liu@kernel.org
</content>
</entry>
<entry>
<title>x86/hyperv: Load/save the Isolation Configuration leaf</title>
<updated>2021-02-11T08:47:05Z</updated>
<author>
<name>Andrea Parri (Microsoft)</name>
<email>parri.andrea@gmail.com</email>
</author>
<published>2021-02-01T14:48:11Z</published>
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<id>urn:sha1:a6c76bb08dc7f7ff2b1c381002eb6c7211746182</id>
<content type='text'>
If bit 22 of Group B Features is set, the guest has access to the
Isolation Configuration CPUID leaf.  On x86, the first four bits
of EAX in this leaf provide the isolation type of the partition;
we entail three isolation types: 'SNP' (hardware-based isolation),
'VBS' (software-based isolation), and 'NONE' (no isolation).

Signed-off-by: Andrea Parri (Microsoft) &lt;parri.andrea@gmail.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: x86@kernel.org
Cc: linux-arch@vger.kernel.org
Link: https://lore.kernel.org/r/20210201144814.2701-2-parri.andrea@gmail.com
Reviewed-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Signed-off-by: Wei Liu &lt;wei.liu@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86/hyperv: Enable 15-bit APIC ID if the hypervisor supports it</title>
<updated>2020-11-04T10:10:52Z</updated>
<author>
<name>Dexuan Cui</name>
<email>decui@microsoft.com</email>
</author>
<published>2020-11-03T01:11:36Z</published>
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<id>urn:sha1:d981059e13ffa9ed03a73472e932d070323bd057</id>
<content type='text'>
When a Linux VM runs on Hyper-V, if the VM has CPUs with &gt;255 APIC IDs,
the CPUs can't be the destination of IOAPIC interrupts, because the
IOAPIC RTE's Dest Field has only 8 bits. Currently the hackery driver
drivers/iommu/hyperv-iommu.c is used to ensure IOAPIC interrupts are
only routed to CPUs that don't have &gt;255 APIC IDs. However, there is
an issue with kdump, because the kdump kernel can run on any CPU, and
hence IOAPIC interrupts can't work if the kdump kernel run on a CPU
with a &gt;255 APIC ID.

The kdump issue can be fixed by the Extended Dest ID, which is introduced
recently by David Woodhouse (for IOAPIC, see the field virt_destid_8_14 in
struct IO_APIC_route_entry). Of course, the Extended Dest ID needs the
support of the underlying hypervisor. The latest Hyper-V has added the
support recently: with this commit, on such a Hyper-V host, Linux VM
does not use hyperv-iommu.c because hyperv_prepare_irq_remapping()
returns -ENODEV; instead, Linux kernel's generic support of Extended Dest
ID from David is used, meaning that Linux VM is able to support up to
32K CPUs, and IOAPIC interrupts can be routed to all the CPUs.

On an old Hyper-V host that doesn't support the Extended Dest ID, nothing
changes with this commit: Linux VM is still able to bring up the CPUs with
&gt; 255 APIC IDs with the help of hyperv-iommu.c, but IOAPIC interrupts still
can not go to such CPUs, and the kdump kernel still can not work properly
on such CPUs.

[ tglx: Updated comment as suggested by David ]

Signed-off-by: Dexuan Cui &lt;decui@microsoft.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: David Woodhouse &lt;dwmw@amazon.co.uk&gt;
Link: https://lore.kernel.org/r/20201103011136.59108-1-decui@microsoft.com
</content>
</entry>
<entry>
<title>x86/hyperv: Remove aliases with X64 in their name</title>
<updated>2020-09-27T09:34:54Z</updated>
<author>
<name>Joseph Salisbury</name>
<email>joseph.salisbury@microsoft.com</email>
</author>
<published>2020-09-26T14:26:26Z</published>
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<id>urn:sha1:dfc53baae3c6a165a35735b789e3e083786271d6</id>
<content type='text'>
In the architecture independent version of hyperv-tlfs.h, commit c55a844f46f958b
removed the "X64" in the symbol names so they would make sense for both x86 and
ARM64.  That commit added aliases with the "X64" in the x86 version of hyperv-tlfs.h 
so that existing x86 code would continue to compile.

As a cleanup, update the x86 code to use the symbols without the "X64", then remove 
the aliases.  There's no functional change.

Signed-off-by: Joseph Salisbury &lt;joseph.salisbury@microsoft.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Acked-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Link: https://lore.kernel.org/r/1601130386-11111-1-git-send-email-jsalisbury@linux.microsoft.com

</content>
</entry>
</feed>
