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<title>kernel/arch/riscv/include/asm/processor.h, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2019-01-25T18:50:53Z</updated>
<entry>
<title>riscv: Adjust mmap base address at a third of task size</title>
<updated>2019-01-25T18:50:53Z</updated>
<author>
<name>Alexandre Ghiti</name>
<email>aghiti@upmem.com</email>
</author>
<published>2018-12-10T06:21:46Z</published>
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<id>urn:sha1:ae662eec8a515ab550524e04c793b5ddf1aae3a1</id>
<content type='text'>
This ratio is the most used among all other architectures and make
icache_hygiene libhugetlbfs test pass: this test mmap lots of
hugepages whose addresses, without this patch, reach the end of
the process user address space.

Signed-off-by: Alexandre Ghiti &lt;aghiti@upmem.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>treewide: remove current_text_addr</title>
<updated>2018-10-31T15:54:12Z</updated>
<author>
<name>Nick Desaulniers</name>
<email>ndesaulniers@google.com</email>
</author>
<published>2018-10-30T22:04:47Z</published>
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<id>urn:sha1:de0d22e50cd3d57277f073ccf65d57aa519d6888</id>
<content type='text'>
Prefer _THIS_IP_ defined in linux/kernel.h.

Most definitions of current_text_addr were the same as _THIS_IP_, but
a few archs had inline assembly instead.

This patch removes the final call site of current_text_addr, making all
of the definitions dead code.

[akpm@linux-foundation.org: fix arch/csky/include/asm/processor.h]
Link: http://lkml.kernel.org/r/20180911182413.180715-1-ndesaulniers@google.com
Signed-off-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid</title>
<updated>2018-10-23T00:03:36Z</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@sifive.com</email>
</author>
<published>2018-10-02T19:15:00Z</published>
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<id>urn:sha1:b2f8cfa7ac34202e5fd9551b6507fcd424634c1b</id>
<content type='text'>
It's a bit confusing exactly what this function does: it actually
returns the hartid of an OF processor node, failing with -1 on invalid
nodes.  I've changed the name to _hartid() in order to make that a bit
more clear, as well as adding a comment.

Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
[Atish: code comment formatting update]
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Task implementation</title>
<updated>2017-09-26T22:26:46Z</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@dabbelt.com</email>
</author>
<published>2017-07-11T01:04:30Z</published>
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<id>urn:sha1:7db91e57a0acde126a162ababfb1e0ab190130cb</id>
<content type='text'>
This patch contains the implementation of tasks on RISC-V, most of which
is involved in task switching.

Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</content>
</entry>
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