<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/powerpc/sysdev/xics/ics-opal.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable'/>
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<updated>2023-08-16T13:54:48Z</updated>
<entry>
<title>powerpc/xics: Remove unnecessary endian conversion</title>
<updated>2023-08-16T13:54:48Z</updated>
<author>
<name>Gautam Menghani</name>
<email>gautam@linux.ibm.com</email>
</author>
<published>2023-07-31T11:55:39Z</published>
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<id>urn:sha1:984b07b428994d9e83c6de9a5f1307948188fe71</id>
<content type='text'>
Remove an unnecessary piece of code that does an endianness conversion
but does not use the result. The following warning was reported by
Clang's static analyzer:

  arch/powerpc/sysdev/xics/ics-opal.c:114:2: warning: Value stored to
  'server' is never read [deadcode.DeadStores]
  server = be16_to_cpu(oserver);

'server' was used as a parameter to opal_get_xive() in commit
5c7c1e9444d8 ("powerpc/powernv: Add OPAL ICS backend") when it was
introduced. 'server' was also used in an error message for the call to
opal_get_xive().

'server' was always later set by a call to ics_opal_mangle_server()
before being used.

Commit bf8e0f891a32 ("powerpc/powernv: Fix endian issues in OPAL ICS
backend") used a new variable 'oserver' as the parameter to
opal_get_xive() instead of 'server' for endian correctness. It also
removed 'server' from the error message for the call to opal_get_xive().

Fix the warning by removing the server variable assignment.

Fixes: bf8e0f891a32 ("powerpc/powernv: Fix endian issues in OPAL ICS backend")
Reviewed-by: Jordan Niethe &lt;jniethe5@gmail.com&gt;
Signed-off-by: Gautam Menghani &lt;gautam@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://msgid.link/20230731115543.36991-1-gautam@linux.ibm.com

</content>
</entry>
<entry>
<title>powerpc: Remove asm/prom.h from all files that don't need it</title>
<updated>2022-05-08T12:15:04Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2022-03-08T19:20:24Z</published>
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<id>urn:sha1:86c38fec69a461846d84f250f281e8cfbe54b25a</id>
<content type='text'>
Several files include asm/prom.h for no reason.

Clean it up.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
[mpe: Drop change to prom_parse.c as reported by lkp@intel.com]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/7c9b8fda63dcf63e1b28f43e7ebdb95182cbc286.1646767214.git.christophe.leroy@csgroup.eu
</content>
</entry>
<entry>
<title>powerpc/xics: Drop unmask of MSIs at startup</title>
<updated>2021-08-10T13:15:00Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-07-01T13:27:41Z</published>
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<id>urn:sha1:1e661f81a522eadfe4bc5bb1ec9fbae27c13f163</id>
<content type='text'>
That was a workaround in the XICS domain because of the lack of MSI
domain. This is now handled.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210701132750.1475580-24-clg@kaod.org

</content>
</entry>
<entry>
<title>powerpc/xics: Add debug logging to the set_irq_affinity handlers</title>
<updated>2021-08-10T13:14:59Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-07-01T13:27:37Z</published>
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<id>urn:sha1:53b34e8db73af98fa652641bf490384dc665d0f2</id>
<content type='text'>
It really helps to know how the HW is configured when tweaking the IRQ
subsystem.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210701132750.1475580-20-clg@kaod.org

</content>
</entry>
<entry>
<title>powerpc/xics: Rename the map handler in a check handler</title>
<updated>2021-08-10T13:14:59Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-07-01T13:27:35Z</published>
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<id>urn:sha1:248af248a8f45461662fb633eca4adf24ae704ad</id>
<content type='text'>
This moves the IRQ initialization done under the different ICS backends
in the common part of XICS. The 'map' handler becomes a simple 'check'
on the HW IRQ at the FW level.

As we don't need an ICS anymore in xics_migrate_irqs_away(), the XICS
domain does not set a chip data for the IRQ.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210701132750.1475580-18-clg@kaod.org

</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152</title>
<updated>2019-05-30T18:26:32Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-27T06:55:01Z</published>
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<id>urn:sha1:2874c5fd284268364ece81a7bd936f3c8168e567</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Use pr_warn instead of pr_warning</title>
<updated>2017-12-04T00:54:34Z</updated>
<author>
<name>Joe Perches</name>
<email>joe@perches.com</email>
</author>
<published>2016-10-25T04:00:08Z</published>
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<id>urn:sha1:f2c2cbcc35d47f1471a04155ac357521f5170371</id>
<content type='text'>
At some point, pr_warning will be removed so all logging messages use
a consistent &lt;prefix&gt;_warn style.

Update arch/powerpc/

Miscellanea:

o Coalesce formats
o Realign arguments
o Use %s, __func__ instead of embedded function names
o Remove unnecessary line continuations

Signed-off-by: Joe Perches &lt;joe@perches.com&gt;
Acked-by: Geoff Levand &lt;geoff@infradead.org&gt;
[mpe: Rebase due to some %pOF changes.]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/xics: Properly set Edge/Level type and enable resend</title>
<updated>2016-08-09T04:50:18Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2016-08-02T02:39:43Z</published>
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<id>urn:sha1:880a3d6afd068682d6386a0528be1217541d3d8e</id>
<content type='text'>
This sets the type of the interrupt appropriately. We set it as follow:

 - If not mapped from the device-tree, we use edge. This is the case
of the virtual interrupts and PCI MSIs for example.

 - If mapped from the device-tree and #interrupt-cells is 2 (PAPR
compliant), we use the second cell to set the appropriate type

 - If mapped from the device-tree and #interrupt-cells is 1 (current
OPAL on P8 does that), we assume level sensitive since those are
typically going to be the PSI LSIs which are level sensitive.

Additionally, we mark the interrupts requested via the opal_interrupts
property all level. This is a bit fishy but the best we can do until we
fix OPAL to properly expose them with a complete descriptor. It is also
correct for the current HW anyway as OPAL interrupts are currently PCI
error and PSI interrupts which are level.

Finally now that edge interrupts are properly identified, we can enable
CONFIG_HARDIRQS_SW_RESEND which will make the core re-send them if
they occur while masked, which some drivers rely upon.

This fixes issues with lost interrupts on some Mellanox adapters.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc, irq: Use access helper irq_data_get_affinity_mask()</title>
<updated>2015-09-15T15:06:28Z</updated>
<author>
<name>Jiang Liu</name>
<email>jiang.liu@linux.intel.com</email>
</author>
<published>2015-06-01T08:05:33Z</published>
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<id>urn:sha1:da92b4eb7e2ec9866f14a0c8f453788e8052dee7</id>
<content type='text'>
Use access helper irq_data_get_affinity_mask() so we can move the
affinity mask to irq_common_data.

Signed-off-by: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/1433145945-789-25-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>treewide: Use helper function to access irq_data-&gt;msi_desc</title>
<updated>2015-07-16T21:31:37Z</updated>
<author>
<name>Jiang Liu</name>
<email>jiang.liu@linux.intel.com</email>
</author>
<published>2015-06-01T08:05:42Z</published>
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<id>urn:sha1:507a883ed5396825b88631b06cd27e050f5aa8fe</id>
<content type='text'>
Use irq_data access helper to access irq_data-&gt;msi_desc, so we can
move msi_desc from struct irq_data into struct irq_common_data later.

Signed-off-by: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
</feed>
