kernel/arch/powerpc/sysdev/fsl_pci.c, branch linux-rolling-stable

syscore: Pass context data to callbacks

2025-11-14T09:01:52Z

Several drivers can benefit from registering per-instance data along with the syscore operations. To achieve this, move the modifiable fields out of the syscore_ops structure and into a separate struct syscore that can be registered with the framework. Add a void * driver data field for drivers to store contextual data that will be passed to the syscore ops. Acked-by: Rafael J. Wysocki (Intel) Signed-off-by: Thierry Reding

powerpc/fsl-pci: Use PCI_HEADER_TYPE_MASK instead of literal

2023-12-01T21:00:54Z

Replace 0x7f literals with PCI_HEADER_TYPE_MASK. Link: https://lore.kernel.org/r/20231124090919.23687-2-ilpo.jarvinen@linux.intel.com Signed-off-by: Ilpo Järvinen Signed-off-by: Bjorn Helgaas

powerpc: Drop zalloc_maybe_bootmem()

2023-08-24T12:33:16Z

The only callers of zalloc_maybe_bootmem() are PCI setup routines. These used to be called early during boot before slab setup, and also during runtime due to hotplug. But commit 5537fcb319d0 ("powerpc/pci: Add ppc_md.discover_phbs()") moved the boot-time calls later, after slab setup, meaning there's no longer any need for zalloc_maybe_bootmem(), kzalloc() can be used in all cases. Reviewed-by: Christophe Leroy Signed-off-by: Michael Ellerman Link: https://msgid.link/20230823055430.752550-1-mpe@ellerman.id.au

powerpc/fsl_pci: Make fsl_add_bridge() static

2023-08-18T07:03:13Z

Since commit 905e75c46dba ("powerpc/fsl-pci: Unify pci/pcie initialization code") fsl_add_bridge() is not used anymore outside of fsl_pci.c Make it static. Signed-off-by: Christophe Leroy Signed-off-by: Michael Ellerman Link: https://msgid.link/2115e3597d81e72a865820af54f0e290d0fd2b3a.1692199186.git.christophe.leroy@csgroup.eu

iommu/fsl: Use driver_managed_dma to allow VFIO to work

2023-06-01T09:47:48Z

The FSL driver is mangling the iommu_groups to not have a group for its PCI bridge/controller (eg the thing passed to fsl_add_bridge()). Robin says this is so FSL could work with VFIO which would be blocked by having a probed driver on the platform_device in the same group. This is supported by comments from FSL: https://lore.kernel.org/all/C5ECD7A89D1DC44195F34B25E172658D459471@039-SN2MPN1-013.039d.mgd.msft.net .. PCIe devices share the same device group as the PCI controller. This becomes a problem while assigning the devices to the guest, as you are required to unbind all the PCIe devices including the controller from the host. PCIe controller can't be unbound from the host, so we simply delete the controller iommu_group. However, today, we use driver_managed_dma to allow PCI infrastructure devices that are 'security safe' to co-exist in groups and still allow VFIO to work. Set this flag for the fsl_pci_driver. Change fsl_pamu_device_group() so that it no longer removes the controller from any groups. For check_pci_ctl_endpt_part() mode this creates an extra group that contains only the controller. Otherwise force the controller's single group to be the group of all the PCI devices on the controller's hose. VFIO continues to work because of driver_managed_dma. Remove the iommu_group_remove_device() calls from fsl_pamu and lightly restructure its fsl_pamu_device_group() function. Signed-off-by: Jason Gunthorpe Tested-by: Michael Ellerman Link: https://lore.kernel.org/r/3-v2-ce71068deeec+4cf6-fsl_rm_groups_jgg@nvidia.com Signed-off-by: Joerg Roedel

powerpc/fsl-pci: Choose PCI host bridge with alias pci0 as the primary

2022-11-30T10:46:48Z

If there's no PCI host bridge with ISA then check for PCI host bridge with alias "pci0" (first PCI host bridge) and if it exists then choose it as the primary PCI host bridge. This makes choice of primary PCI host bridge more stable across boots and updates as the last fallback candidate for primary PCI host bridge (if there is no choice) is selected arbitrary. Signed-off-by: Pali Rohár Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220820123327.20551-1-pali@kernel.org

powerpc: Change CONFIG_E500 to CONFIG_PPC_E500

2022-09-26T13:00:13Z

It will be used outside arch/powerpc, make it clear its a powerpc configuration item. And we already have CONFIG_PPC_E500MC, so that will make it more consistent. Signed-off-by: Christophe Leroy Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/e63b22083c11c4300f4a82d3123a46e5fdd54fa6.1663606876.git.christophe.leroy@csgroup.eu

powerpc/fsl_pci: Remove of_node_put() when reference escaped out

2022-09-05T07:30:29Z

In fsl_pci_assign_primary(), we should remove the of_node_put() when breaking out of the for_each_matching_node() as the 'np' is escaped out by global 'fsl_pci_primary'. Signed-off-by: Liang He Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220720124557.1256243-1-windhl@126.com

powerpc/sysdev: Add missing of_node_put()s

2022-09-05T07:28:27Z

Add of_node_put() in various paths to drop references once they are no longer needed. Signed-off-by: Liang He [mpe: Rewrite change log] Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220620130221.4073228-1-windhl@126.com

powerpc/fsl-pci: Fix Class Code of PCIe Root Port

2022-07-27T11:36:03Z

By default old pre-3.0 Freescale PCIe controllers reports invalid PCI Class Code 0x0b20 for PCIe Root Port. It can be seen by lspci -b output on P2020 board which has this pre-3.0 controller: $ lspci -bvnn 00:00.0 Power PC [0b20]: Freescale Semiconductor Inc P2020E [1957:0070] (rev 21) !!! Invalid class 0b20 for header type 01 Capabilities: [4c] Express Root Port (Slot-), MSI 00 Fix this issue by programming correct PCI Class Code 0x0604 for PCIe Root Port to the Freescale specific PCIe register 0x474. With this change lspci -b output is: $ lspci -bvnn 00:00.0 PCI bridge [0604]: Freescale Semiconductor Inc P2020E [1957:0070] (rev 21) (prog-if 00 [Normal decode]) Capabilities: [4c] Express Root Port (Slot-), MSI 00 Without any "Invalid class" error. So class code was properly reflected into standard (read-only) PCI register 0x08. Same fix is already implemented in U-Boot pcie_fsl.c driver in commit: http://source.denx.de/u-boot/u-boot/-/commit/d18d06ac35229345a0af80977a408cfbe1d1015b Fix activated by U-Boot stay active also after booting Linux kernel. But boards which use older U-Boot version without that fix are affected and still require this fix. So implement this class code fix also in kernel fsl_pci.c driver. Cc: stable@vger.kernel.org Signed-off-by: Pali Rohár Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220706101043.4867-1-pali@kernel.org