<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/powerpc/include/asm/ppc_asm.h, branch linux-5.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.2.y'/>
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<updated>2018-12-20T11:58:57Z</updated>
<entry>
<title>powerpc/fsl: Add macro to flush the branch predictor</title>
<updated>2018-12-20T11:58:57Z</updated>
<author>
<name>Diana Craciun</name>
<email>diana.craciun@nxp.com</email>
</author>
<published>2018-12-12T14:03:01Z</published>
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<id>urn:sha1:1cbf8990d79ff69da8ad09e8a3df014e1494462b</id>
<content type='text'>
The BUCSR register can be used to invalidate the entries in the
branch prediction mechanisms.

Signed-off-by: Diana Craciun &lt;diana.craciun@nxp.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: remove remaining bits from CONFIG_APUS</title>
<updated>2018-12-19T07:56:32Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2018-12-04T17:59:15Z</published>
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<id>urn:sha1:c62ce9ef97ba8af4120c766c32e230215dd4df04</id>
<content type='text'>
commit f21f49ea639a ("[POWERPC] Remove the dregs of APUS support from
arch/powerpc") removed CONFIG_APUS, but forgot to remove the logic
which adapts tophys() and tovirt() for it.

This patch removes the last stale pieces.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: clean inclusions of asm/feature-fixups.h</title>
<updated>2018-07-30T12:48:17Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2018-07-05T16:25:01Z</published>
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<id>urn:sha1:2c86cd188f8a5631f3d75a1dea14d22df85189b4</id>
<content type='text'>
files not using feature fixup don't need asm/feature-fixups.h
files using feature fixup need asm/feature-fixups.h

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/32: Use stmw/lmw for registers save/restore in asm</title>
<updated>2018-05-17T14:09:06Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2018-04-17T17:08:18Z</published>
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<id>urn:sha1:a1f3ae3fe8a1883c339f1bc89d1c941b3809e084</id>
<content type='text'>
arch/powerpc/Makefile activates -mmultiple on BE PPC32 configs
in order to use multiple word instructions in functions entry/exit.

The patch does the same for the asm parts, for consistency.

On processors like the 8xx on which insn fetching is pretty slow,
this speeds up registers save/restore.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
[mpe: PPC32 is BE only, so drop the endian checks]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/64s: Set assembler machine type to POWER4</title>
<updated>2018-03-31T13:47:49Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-02-20T19:08:26Z</published>
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<id>urn:sha1:15a3204d24a3c01b116fb7c0692b7c670cac631d</id>
<content type='text'>
Rather than override the machine type in .S code (which can hide wrong
or ambiguous code generation for the target), set the type to power4
for all assembly.

This also means we need to be careful not to build power4-only code
when we're not building for Book3S, such as the "power7" versions of
copyuser/page/memcpy.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
[mpe: Fix Book3E build, don't build the "power7" variants for non-Book3S]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/book3s: Add an HV variant of FIXUP_ENDIAN that is recoverable</title>
<updated>2017-11-06T05:48:08Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2017-10-23T07:08:14Z</published>
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<id>urn:sha1:8ca9c08d0c8f6d68db9b592dc149cb8284173ca8</id>
<content type='text'>
Add an HV variant of FIXUP_ENDIAN which uses HSRR[01] and does not
clear MSR[RI], which improves recoverability.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/book3s: Use label for FIXUP_ENDIAN macro branch</title>
<updated>2017-11-06T05:48:07Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2017-10-23T07:08:13Z</published>
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<id>urn:sha1:f848ea7f5960ec2684c3bd1c0692e6f5ad47a27d</id>
<content type='text'>
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/8xx: Getting rid of remaining use of CONFIG_8xx</title>
<updated>2017-08-10T13:32:12Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2017-08-08T11:58:54Z</published>
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<id>urn:sha1:968159c0031ac1e07ab4426397e786c9c483f068</id>
<content type='text'>
Two config options exist to define powerpc MPC8xx:
* CONFIG_PPC_8xx
* CONFIG_8xx

arch/powerpc/platforms/Kconfig.cputype has contained the following
comment about CONFIG_8xx item for some years:
"# this is temp to handle compat with arch=ppc"

arch/powerpc is now the only place with remaining use of
CONFIG_8xx: get rid of them.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/time: refactor MFTB() to limit number of ifdefs</title>
<updated>2017-08-10T13:32:09Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2017-08-08T11:58:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=72e4b2cdf07b4c43115f058ed74d694eab5d6454'/>
<id>urn:sha1:72e4b2cdf07b4c43115f058ed74d694eab5d6454</id>
<content type='text'>
The 8xx cannot access the TBL and TBU registers using mfspr/mtspr
It must be accessed using mftb/mftbu

Due to this, there is a number of places with #ifdef CONFIG_8xx

This patch defines new macros MFTBL(x) and MFTBU(x) on the same model
as MFTB(x) and tries to make use of them as much as possible.

In arch/powerpc/include/asm/timex.h, we also remove the ifdef
for the asm() operands as the compiler doesn't mind unused operands

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Fix invalid use of register expressions</title>
<updated>2017-08-10T12:29:41Z</updated>
<author>
<name>Andreas Schwab</name>
<email>schwab@linux-m68k.org</email>
</author>
<published>2017-08-05T17:55:11Z</published>
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<id>urn:sha1:8a583c0a8d316d8ea52ea78491174ab1a3e9ef9d</id>
<content type='text'>
binutils &gt;= 2.26 now warns about misuse of register expressions in
assembler operands that are actually literals, for example:

  arch/powerpc/kernel/entry_64.S:535: Warning: invalid register expression

In practice these are almost all uses of r0 that should just be a
literal 0.

Signed-off-by: Andreas Schwab &lt;schwab@linux-m68k.org&gt;
[mpe: Mention r0 is almost always the culprit, fold in purgatory change]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
</feed>
