<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/powerpc/include/asm/opal.h, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2018-12-21T00:32:49Z</updated>
<entry>
<title>powerpc/powernv: Move opal_power_control_init() call in opal_init().</title>
<updated>2018-12-21T00:32:49Z</updated>
<author>
<name>Mahesh Salgaonkar</name>
<email>mahesh@linux.vnet.ibm.com</email>
</author>
<published>2018-12-13T05:47:31Z</published>
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<id>urn:sha1:08fb726df13778a54592aaa1deea6a154637c868</id>
<content type='text'>
opal_power_control_init() depends on opal message notifier to be
initialized, which is done in opal_init()-&gt;opal_message_init(). But both
these initialization are called through machine initcalls and it all
depends on in which order they being called. So far these are called in
correct order (may be we got lucky) and never saw any issue. But it is
clearer to control initialization order explicitly by moving
opal_power_control_init() into opal_init().

Signed-off-by: Mahesh Salgaonkar &lt;mahesh@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: provide a console flush operation for opal hvc driver</title>
<updated>2018-08-20T10:19:54Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-04-30T14:55:58Z</published>
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<id>urn:sha1:95b861a76c1ded3e89d33a3d9f4552dce22e9875</id>
<content type='text'>
Provide the flush hv_op for the opal hvc driver. This will flush the
firmware console buffers without spinning with interrupts disabled.

Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>crypto/nx: Initialize 842 high and normal RxFIFO control registers</title>
<updated>2018-08-07T14:32:34Z</updated>
<author>
<name>Haren Myneni</name>
<email>haren@linux.vnet.ibm.com</email>
</author>
<published>2018-06-13T07:32:40Z</published>
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<id>urn:sha1:656ecc16e8fc2ab44b3d70e3fcc197a7020d0ca5</id>
<content type='text'>
NX increments readOffset by FIFO size in receive FIFO control register
when CRB is read. But the index in RxFIFO has to match with the
corresponding entry in FIFO maintained by VAS in kernel. Otherwise NX
may be processing incorrect CRBs and can cause CRB timeout.

VAS FIFO offset is 0 when the receive window is opened during
initialization. When the module is reloaded or in kexec boot, readOffset
in FIFO control register may not match with VAS entry. This patch adds
nx_coproc_init OPAL call to reset readOffset and queued entries in FIFO
control register for both high and normal FIFOs.

Signed-off-by: Haren Myneni &lt;haren@us.ibm.com&gt;
[mpe: Fixup uninitialized variable warning]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Add support to enable sensor groups</title>
<updated>2018-07-31T09:56:45Z</updated>
<author>
<name>Shilpasri G Bhat</name>
<email>shilpa.bhat@linux.vnet.ibm.com</email>
</author>
<published>2018-07-24T09:13:08Z</published>
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<id>urn:sha1:04baaf28f40c68c35a413cd9d0db7139c67e6caf</id>
<content type='text'>
Adds support to enable/disable a sensor group at runtime. This
can be used to select the sensor groups that needs to be copied to
main memory by OCC. Sensor groups like power, temperature, current,
voltage, frequency, utilization can be enabled/disabled at runtime.

Signed-off-by: Shilpasri G Bhat &lt;shilpa.bhat@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: implement opal_put_chars_atomic</title>
<updated>2018-07-24T12:09:57Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-04-30T14:55:51Z</published>
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<id>urn:sha1:17cc1dd4924391b54fb179d0868b89dc96f2ee80</id>
<content type='text'>
The RAW console does not need writes to be atomic, so relax
opal_put_chars to be able to do partial writes, and implement an
_atomic variant which does not take a spinlock. This API is used
in xmon, so the less locking that is used, the better chance there
is that a crash can be debugged.

Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Implement and use opal_flush_console</title>
<updated>2018-07-24T12:09:56Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-04-30T14:55:48Z</published>
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<id>urn:sha1:d2a2262e686ce7a27776add27751f925ceda856f</id>
<content type='text'>
A new console flushing firmware API was introduced to replace event
polling loops, and implemented in opal-kmsg with affddff69c55e
("powerpc/powernv: Add a kmsg_dumper that flushes console output on
panic"), to flush the console in the panic path.

The OPAL console driver has other situations where interrupts are off
and it needs to flush the console synchronously. These still use a
polling loop.

So move the opal-kmsg flush code to opal_flush_console, and use the
new function in opal-kmsg and opal_put_chars.

Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Reviewed-by: Russell Currey &lt;ruscur@russell.cc&gt;
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: use time64_t in read_persistent_clock</title>
<updated>2018-06-03T10:43:33Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-04-23T08:36:40Z</published>
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<id>urn:sha1:5bfd643583b2e2a203163fd6b617cd9027054200</id>
<content type='text'>
Looking through the remaining users of the deprecated mktime()
function, I found the powerpc rtc handlers, which use it in
place of rtc_tm_to_time64().

To clean this up, I'm changing over the read_persistent_clock()
function to the read_persistent_clock64() variant, and change
all the platform specific handlers along with it.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: call OPAL_QUIESCE before OPAL_SIGNAL_SYSTEM_RESET</title>
<updated>2018-06-03T10:40:30Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-05-10T12:21:48Z</published>
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<id>urn:sha1:ee03b9b4479d1302d01cebedda3518dc967697b7</id>
<content type='text'>
Although it is often possible to recover a CPU that was interrupted
from OPAL with a system reset NMI, it's undesirable to interrupt them
for a few reasons. Firstly because dump/debug code itself needs to
call firmware, so it could hang on a lock or possibly corrupt a
per-cpu data structure if it or another CPU was interrupted from
OPAL. Secondly, the kexec crash dump code will not return from
interrupt to unwind the OPAL call.

Call OPAL_QUIESCE with QUIESCE_HOLD before sending an NMI IPI to
another CPU, which wait for it to leave firmware (or time out) to
avoid this problem in normal conditions. Firmware bugs may still
result in a timeout and interrupting OPAL, but that is the best
option (stops the CPU, and possibly allows firmware to be debugged).

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powernv: opal-sensor: Add support to read 64bit sensor values</title>
<updated>2018-05-21T04:48:02Z</updated>
<author>
<name>Shilpasri G Bhat</name>
<email>shilpa.bhat@linux.vnet.ibm.com</email>
</author>
<published>2018-05-07T10:25:36Z</published>
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<id>urn:sha1:5cdcb01e0af5a709c9bebe0e0450dc0c2f11a4d5</id>
<content type='text'>
This patch adds support to read 64-bit sensor values. This method is
used to read energy sensors and counters which are of type u64.

Signed-off-by: Shilpasri G Bhat &lt;shilpa.bhat@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: define a standard delay for OPAL_BUSY type retry loops</title>
<updated>2018-04-10T14:05:23Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2018-04-10T11:49:31Z</published>
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<id>urn:sha1:34dd25de9fe3f60bfdb31b473bf04b28262d0896</id>
<content type='text'>
This is the start of an effort to tidy up and standardise all the
delays. Existing loops have a range of delay/sleep periods from 1ms
to 20ms, and some have no delay. They all loop forever except rtc,
which times out after 10 retries, and that uses 10ms delays. So use
10ms as our standard delay. The OPAL maintainer agrees 10ms is a
reasonable starting point.

The idea is to use the same recipe everywhere, once this is proven to
work then it will be documented as an OPAL API standard. Then both
firmware and OS can agree, and if a particular call needs something
else, then that can be documented with reasoning.

This is not the end-all of this effort, it's just a relatively easy
change that fixes some existing high latency delays. There should be
provision for standardising timeouts and/or interruptible loops where
possible, so non-fatal firmware errors don't cause hangs.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
</feed>
