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<title>kernel/arch/powerpc/include/asm/kvm_host.h, branch linux-5.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.2.y</id>
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<updated>2019-06-05T15:30:28Z</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 266</title>
<updated>2019-06-05T15:30:28Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-29T14:12:40Z</published>
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<id>urn:sha1:d94d71cb45fda694a7189839f1c6aacb4f615f95</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not write to the free
  software foundation 51 franklin street fifth floor boston ma 02110
  1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 67 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141333.953658117@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Book3S: Use new mutex to synchronize access to rtas token list</title>
<updated>2019-05-29T03:44:36Z</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@ozlabs.org</email>
</author>
<published>2019-05-29T01:54:00Z</published>
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<id>urn:sha1:1659e27d2bc1ef47b6d031abe01b467f18cb72d9</id>
<content type='text'>
Currently the Book 3S KVM code uses kvm-&gt;lock to synchronize access
to the kvm-&gt;arch.rtas_tokens list.  Because this list is scanned
inside kvmppc_rtas_hcall(), which is called with the vcpu mutex held,
taking kvm-&gt;lock cause a lock inversion problem, which could lead to
a deadlock.

To fix this, we add a new mutex, kvm-&gt;arch.rtas_token_lock, which nests
inside the vcpu mutexes, and use that instead of kvm-&gt;lock when
accessing the rtas token list.

This removes the lockdep_assert_held() in kvmppc_rtas_tokens_free().
At this point we don't hold the new mutex, but that is OK because
kvmppc_rtas_tokens_free() is only called when the whole VM is being
destroyed, and at that point nothing can be looking up a token in
the list.

Signed-off-by: Paul Mackerras &lt;paulus@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Book3S HV: Use new mutex to synchronize MMU setup</title>
<updated>2019-05-29T03:44:36Z</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@ozlabs.org</email>
</author>
<published>2019-05-23T06:35:34Z</published>
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<id>urn:sha1:0d4ee88d92884c661fcafd5576da243aa943dc24</id>
<content type='text'>
Currently the HV KVM code uses kvm-&gt;lock in conjunction with a flag,
kvm-&gt;arch.mmu_ready, to synchronize MMU setup and hold off vcpu
execution until the MMU-related data structures are ready.  However,
this means that kvm-&gt;lock is being taken inside vcpu-&gt;mutex, which
is contrary to Documentation/virtual/kvm/locking.txt and results in
lockdep warnings.

To fix this, we add a new mutex, kvm-&gt;arch.mmu_setup_lock, which nests
inside the vcpu mutexes, and is taken in the places where kvm-&gt;lock
was taken that are related to MMU setup.

Additionally we take the new mutex in the vcpu creation code at the
point where we are creating a new vcore, in order to provide mutual
exclusion with kvmppc_update_lpcr() and ensure that an update to
kvm-&gt;arch.lpcr doesn't get missed, which could otherwise lead to a
stale vcore-&gt;lpcr value.

Signed-off-by: Paul Mackerras &lt;paulus@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Book3S HV: XIVE: Replace the 'destroy' method by a 'release' method</title>
<updated>2019-04-30T09:40:39Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2019-04-18T10:39:42Z</published>
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<id>urn:sha1:5422e95103cf9663bc86cf1056a3ea44c2e2f09e</id>
<content type='text'>
When a P9 sPAPR VM boots, the CAS negotiation process determines which
interrupt mode to use (XICS legacy or XIVE native) and invokes a
machine reset to activate the chosen mode.

We introduce 'release' methods for the XICS-on-XIVE and the XIVE
native KVM devices which are called when the file descriptor of the
device is closed after the TIMA and ESB pages have been unmapped.
They perform the necessary cleanups : clear the vCPU interrupt
presenters that could be attached and then destroy the device. The
'release' methods replace the 'destroy' methods as 'destroy' is not
called anymore once 'release' is. Compatibility with older QEMU is
nevertheless maintained.

This is not considered as a safe operation as the vCPUs are still
running and could be referencing the KVM device through their
presenters. To protect the system from any breakage, the kvmppc_xive
objects representing both KVM devices are now stored in an array under
the VM. Allocation is performed on first usage and memory is freed
only when the VM exits.

[paulus@ozlabs.org - Moved freeing of xive structures to book3s.c,
 put it under #ifdef CONFIG_KVM_XICS.]

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Book3S HV: XIVE: Introduce a new capability KVM_CAP_PPC_IRQ_XIVE</title>
<updated>2019-04-30T09:35:16Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2019-04-18T10:39:28Z</published>
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<id>urn:sha1:eacc56bb9de3e6830ddc169553772cd6de59ee4c</id>
<content type='text'>
The user interface exposes a new capability KVM_CAP_PPC_IRQ_XIVE to
let QEMU connect the vCPU presenters to the XIVE KVM device if
required. The capability is not advertised for now as the full support
for the XIVE native exploitation mode is not yet available. When this
is case, the capability will be advertised on PowerNV Hypervisors
only. Nested guests (pseries KVM Hypervisor) are not supported.

Internally, the interface to the new KVM device is protected with a
new interrupt mode: KVMPPC_IRQ_XIVE.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Book3S HV: Add a new KVM device for the XIVE native exploitation mode</title>
<updated>2019-04-30T09:35:16Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2019-04-18T10:39:27Z</published>
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<id>urn:sha1:90c73795afa24890bd2ae4f3b359de04b4147d37</id>
<content type='text'>
This is the basic framework for the new KVM device supporting the XIVE
native exploitation mode. The user interface exposes a new KVM device
to be created by QEMU, only available when running on a L0 hypervisor.
Support for nested guests is not available yet.

The XIVE device reuses the device structure of the XICS-on-XIVE device
as they have a lot in common. That could possibly change in the future
if the need arise.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Book3S: Allocate guest TCEs on demand too</title>
<updated>2019-04-30T04:43:13Z</updated>
<author>
<name>Alexey Kardashevskiy</name>
<email>aik@ozlabs.ru</email>
</author>
<published>2019-03-29T05:43:26Z</published>
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<id>urn:sha1:e1a1ef84cd07f72ce12f139eb9a37d3f9028e7a7</id>
<content type='text'>
We already allocate hardware TCE tables in multiple levels and skip
intermediate levels when we can, now it is a turn of the KVM TCE tables.
Thankfully these are allocated already in 2 levels.

This moves the table's last level allocation from the creating helper to
kvmppc_tce_put() and kvm_spapr_tce_fault(). Since such allocation cannot
be done in real mode, this creates a virtual mode version of
kvmppc_tce_put() which handles allocations.

This adds kvmppc_rm_ioba_validate() to do an additional test if
the consequent kvmppc_tce_put() needs a page which has not been allocated;
if this is the case, we bail out to virtual mode handlers.

The allocations are protected by a new mutex as kvm-&gt;lock is not suitable
for the task because the fault handler is called with the mmap_sem held
but kvmhv_setup_mmu() locks kvm-&gt;lock and mmap_sem in the reverse order.

Signed-off-by: Alexey Kardashevskiy &lt;aik@ozlabs.ru&gt;
Signed-off-by: Paul Mackerras &lt;paulus@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvm-ppc-next-5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into kvm-next</title>
<updated>2019-02-22T16:43:05Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2019-02-22T16:43:05Z</published>
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<id>urn:sha1:54a1f393ce1b6645462d7f42e36171f86f54d030</id>
<content type='text'>
PPC KVM update for 5.1

There are no major new features this time, just a collection of bug
fixes and improvements in various areas, including machine check
handling and context switching of protection-key-related registers.
</content>
</entry>
<entry>
<title>KVM: Call kvm_arch_memslots_updated() before updating memslots</title>
<updated>2019-02-20T21:48:32Z</updated>
<author>
<name>Sean Christopherson</name>
<email>sean.j.christopherson@intel.com</email>
</author>
<published>2019-02-05T20:54:17Z</published>
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<id>urn:sha1:152482580a1b0accb60676063a1ac57b2d12daf6</id>
<content type='text'>
kvm_arch_memslots_updated() is at this point in time an x86-specific
hook for handling MMIO generation wraparound.  x86 stashes 19 bits of
the memslots generation number in its MMIO sptes in order to avoid
full page fault walks for repeat faults on emulated MMIO addresses.
Because only 19 bits are used, wrapping the MMIO generation number is
possible, if unlikely.  kvm_arch_memslots_updated() alerts x86 that
the generation has changed so that it can invalidate all MMIO sptes in
case the effective MMIO generation has wrapped so as to avoid using a
stale spte, e.g. a (very) old spte that was created with generation==0.

Given that the purpose of kvm_arch_memslots_updated() is to prevent
consuming stale entries, it needs to be called before the new generation
is propagated to memslots.  Invalidating the MMIO sptes after updating
memslots means that there is a window where a vCPU could dereference
the new memslots generation, e.g. 0, and incorrectly reuse an old MMIO
spte that was created with (pre-wrap) generation==0.

Fixes: e59dbe09f8e6 ("KVM: Introduce kvm_arch_memslots_updated()")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Sean Christopherson &lt;sean.j.christopherson@intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: PPC: Book3S HV: Add KVM stat largepages_[2M/1G]</title>
<updated>2019-02-19T05:00:15Z</updated>
<author>
<name>Suraj Jitindar Singh</name>
<email>sjitindarsingh@gmail.com</email>
</author>
<published>2019-02-19T03:53:45Z</published>
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<id>urn:sha1:8f1f7b9bedbce8d84e0b6b8beac671a6bc8f02c9</id>
<content type='text'>
This adds an entry to the kvm_stats_debugfs directory which provides the
number of large (2M or 1G) pages which have been used to setup the guest
mappings, for radix guests.

Signed-off-by: Suraj Jitindar Singh &lt;sjitindarsingh@gmail.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@ozlabs.org&gt;
</content>
</entry>
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