<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/powerpc/include/asm/cputable.h, branch linux-4.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y'/>
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<updated>2015-03-16T20:52:48Z</updated>
<entry>
<title>powerpc/book3s: Fix flush_tlb cpu_spec hook to take a generic argument.</title>
<updated>2015-03-16T20:52:48Z</updated>
<author>
<name>Mahesh Salgaonkar</name>
<email>mahesh@linux.vnet.ibm.com</email>
</author>
<published>2014-12-19T03:11:05Z</published>
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<id>urn:sha1:45706bb53d118b5340a12926e26444d73b6491f9</id>
<content type='text'>
The flush_tlb hook in cpu_spec was introduced as a generic function hook
to invalidate TLBs. But the current implementation of flush_tlb hook
takes IS (invalidation selector) as an argument which is architecture
dependent. Hence, It is not right to have a generic routine where caller
has to pass non-generic argument.

This patch fixes this and makes flush_tlb hook as high level API.

Reported-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Mahesh Salgaonkar &lt;mahesh@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove unused CPU_FTR_IABR</title>
<updated>2015-01-23T03:02:50Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2015-01-15T01:24:00Z</published>
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<id>urn:sha1:ed77d4182ba9c5c5ab1b28728ae1ce750d575dfa</id>
<content type='text'>
We removed the last usage of CPU_FTR_IABR in commit 1ad7d70562ee
"powerpc/xmon: Enable HW instruction breakpoint on POWER8".

Mark it as free.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove unused CPU_FTRS_A2</title>
<updated>2014-11-09T22:59:29Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2014-08-06T08:26:28Z</published>
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<id>urn:sha1:90029640fd5963343fb862d419db161bc0424120</id>
<content type='text'>
In commit fb5a515704d7 "Remove platforms/wsp and associated pieces" we
removed the last user of CPU_FTRS_A2, so we should remove it too.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove CPU_FTR_HVMODE from CPU_FTRS_ALWAYS</title>
<updated>2014-11-09T22:59:29Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2014-10-23T05:35:14Z</published>
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<id>urn:sha1:66f3d4fe0ba8f38df6141cc0b6ec145be6e63f0e</id>
<content type='text'>
We potentially clear CPU_FTR_HVMODE at runtime in __init_hvmode_206(),
so we must make sure it's not set in CPU_FTRS_ALWAYS.

This doesn't hurt us in practice at the moment, because we don't support
compiling only for CPUs that support CPU_FTR_HVMODE.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc: Add POWER8 features to CPU_FTRS_POSSIBLE/ALWAYS</title>
<updated>2014-08-13T05:13:43Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2014-08-06T05:42:17Z</published>
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<id>urn:sha1:3609e09fd824c37df6f2bf13caa88f6f54a11922</id>
<content type='text'>
We have been a bit slack about updating the CPU_FTRS_POSSIBLE and
CPU_FTRS_ALWAYS masks. When we added POWER8, and also POWER8E we forgot
to update the ALWAYS mask. And when we added POWER8_DD1 we forgot to
update both the POSSIBLE and ALWAYS masks.

Luckily this hasn't caused any actual bugs AFAICS. Failing to update the
ALWAYS mask just forgoes a potential optimisation opportunity. Failing
to update the POSSIBLE mask for POWER8_DD1 is also OK because it only
removes a bit rather than adding any.

Regardless they should all be in both masks so as to avoid any future
bugs when the set of ALWAYS/POSSIBLE bits changes, or the masks
themselves change.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Acked-by: Michael Neuling &lt;mikey@neuling.org&gt;
Acked-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'scott/next' into next</title>
<updated>2014-08-05T04:13:41Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2014-08-05T04:13:41Z</published>
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<id>urn:sha1:9287b95ec9ded0a4458094ebd967502263d80112</id>
<content type='text'>
Scott writes:

Highlights include e6500 hardware threading support, an e6500 TLB erratum
workaround, corenet error reporting, support for a new board, and some
minor fixes.
</content>
</entry>
<entry>
<title>powerpc/e6500: Add support for hardware threads</title>
<updated>2014-07-30T00:26:20Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2011-12-08T07:20:27Z</published>
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<id>urn:sha1:e16c8765533a155ebd3d7c36fc80440a03bbf46a</id>
<content type='text'>
The general idea is that each core will release all of its
threads into the secondary thread startup code, which will
eventually wait in the secondary core holding area, for the
appropriate bit in the PACA to be set. The kick_cpu function
pointer will set that bit in the PACA, and thus "release"
the core/thread to boot. We also need to do a few things that
U-Boot normally does for CPUs (like enable branch prediction).

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
[scottwood@freescale.com: various changes, including only enabling
 threads if Linux wants to kick them]
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove CLASSIC_PPC</title>
<updated>2014-07-28T04:11:22Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2014-07-10T02:29:26Z</published>
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<id>urn:sha1:1e07a0a0336b6349b72127b7280995301f18dba3</id>
<content type='text'>
We have a strange #define in cputable.h called CLASSIC_PPC.

Although it is defined for 32 &amp; 64bit, it's only used for 32bit and
it's basically a duplicate of CONFIG_PPC_BOOK3S_32, so let's use
the latter.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove CONFIG_POWER4</title>
<updated>2014-07-28T04:10:26Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2014-07-10T02:29:25Z</published>
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<id>urn:sha1:804ece07e957298fa15695677c92631744d620af</id>
<content type='text'>
Although the name CONFIG_POWER4 suggests that it controls support for
power4 cpus, this symbol is actually misnamed.

It is a historical wart from the powermac code, which used to support
building a 32-bit kernel for power4. CONFIG_POWER4 was used in that
context to guard code that was 64-bit only.

In the powermac code we can just use CONFIG_PPC64 instead, and in other
places it is a synonym for CONFIG_PPC_BOOK3S_64.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove CONFIG_POWER3</title>
<updated>2014-07-28T04:10:24Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2014-07-10T02:29:22Z</published>
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<id>urn:sha1:c3993f10076ae1fa479d5b3e227fe15e001c45a9</id>
<content type='text'>
Now that we have dropped power3 support we can remove CONFIG_POWER3. The
usage in pgtable_32.c was already dead code as CONFIG_POWER3 was not
selectable on PPC32.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
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