<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/powerpc/boot, branch linux-4.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y</id>
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<updated>2017-05-17T19:07:00Z</updated>
<entry>
<title>powerpc/boot: Fix zImage TOC alignment</title>
<updated>2017-05-17T19:07:00Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2017-03-07T05:14:49Z</published>
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<id>urn:sha1:e04d8b65f4124848640fa67511f2a63692dd8ad8</id>
<content type='text'>
[ Upstream commit 97ee351b50a49717543533cfb85b4bf9d88c9680 ]

Recent toolchains force the TOC to be 256 byte aligned. We need to
enforce this alignment in the zImage linker script, otherwise pointers
to our TOC variables (__toc_start) could be incorrect. If the actual
start of the TOC and __toc_start don't have the same value we crash
early in the zImage wrapper.

Cc: stable@vger.kernel.org
Suggested-by: Alan Modra &lt;amodra@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@verizon.com&gt;
</content>
</entry>
<entry>
<title>powerpc/ps3: Fix system hang with GCC 5 builds</title>
<updated>2017-01-13T01:56:55Z</updated>
<author>
<name>Geoff Levand</name>
<email>geoff@infradead.org</email>
</author>
<published>2016-11-29T18:47:32Z</published>
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<id>urn:sha1:32a27da220fb38ea8227d958b8092b834006c945</id>
<content type='text'>
[ Upstream commit 6dff5b67054e17c91bd630bcdda17cfca5aa4215 ]

GCC 5 generates different code for this bootwrapper null check that
causes the PS3 to hang very early in its bootup. This check is of
limited value, so just get rid of it.

Cc: stable@vger.kernel.org
Signed-off-by: Geoff Levand &lt;geoff@infradead.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@verizon.com&gt;
</content>
</entry>
<entry>
<title>powerpc/boot: Specify ABI v2 when building an LE boot wrapper</title>
<updated>2015-09-29T17:26:05Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2015-09-15T01:24:17Z</published>
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<id>urn:sha1:b46f51da057f2a4728f8cc4e30e64e297151db76</id>
<content type='text'>
commit 655471f54c2e395ba29ae4156ba0f49928177cc1 upstream.

The kernel does it, not the boot wrapper, which breaks with some
cross compilers that still default to ABI v1.

Fixes: 147c05168fc8 ("powerpc/boot: Add support for 64bit little endian wrapper")
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>powerpc: Remove the celleb support</title>
<updated>2015-04-07T07:15:13Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2015-03-19T04:15:20Z</published>
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<id>urn:sha1:bf4981a00636347ddcef3fc008e4dd979380a851</id>
<content type='text'>
The celleb code has seen no actual development for ~7 years.

We (maintainers) have no access to test hardware, and it is highly
likely the code has bit-rotted.

As far as we're aware the hardware was never widely available, and is
certainly no longer available, and no one on the list has shown any
interest in it over the years.

So remove it. If anyone has one and cares please speak up.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Acked-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
</entry>
<entry>
<title>powerpc/t2080qds: fix rtc interrupt</title>
<updated>2015-04-01T03:23:20Z</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2015-03-27T10:49:17Z</published>
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<id>urn:sha1:7f9af0a6d5ab78e3cd40bf7aef1da45ace1d69f6</id>
<content type='text'>
RTC interrupt uses IRQ11 on T2080QDS.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
[scottwood@freescale.com: fix subject line]
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)</title>
<updated>2015-03-24T00:51:19Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2015-02-27T15:16:14Z</published>
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<id>urn:sha1:1e8ed06d3446f354014fffc99ea0b9ac16dfadd5</id>
<content type='text'>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Geoff Thorpe &lt;Geoff.Thorpe@freescale.com&gt;
Signed-off-by: Hai-Ying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Chunhe Lan &lt;Chunhe.Lan@freescale.com&gt;
Signed-off-by: Poonam Aggrwal &lt;poonam.aggrwal@freescale.com&gt;
[Emil Medve: Sync with the upstream binding]
Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/dts: Remove B4860 emulator support</title>
<updated>2015-03-24T00:51:16Z</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@freescale.com</email>
</author>
<published>2015-02-03T23:16:48Z</published>
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<id>urn:sha1:eedea67bc983e642933ab50de44ff9e99ad4b8e7</id>
<content type='text'>
Probably we should have not upstreamed this in the first place

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/boot: don't clobber r6 and r7 in epapr boot</title>
<updated>2015-03-16T07:58:35Z</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-02-11T04:55:44Z</published>
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<id>urn:sha1:7f664cf9e422105644818b180349e3b10a370de7</id>
<content type='text'>
We use r6 and r7 for epapr boot, but the current pre-C init will clobber
both of these.

This change does a simple replacement, of r6 -&gt; r12 and r7 -&gt; r13, so
that we hit platform init with these registers intact.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/boot: Fix stack corruption in epapr entry point</title>
<updated>2015-03-16T07:58:34Z</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-02-11T04:55:44Z</published>
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<id>urn:sha1:8c06f0d910ca628b657dc964a7347e70070dc7d6</id>
<content type='text'>
Currently, a 64-bit little-endian zImage.epapr won't boot in epapr mode,
as we never return from platform_init.

Before entering C, we initialise our stack by setting r1 16 bytes below
the end of the _bss_stack:

  stwu	r0,-16(r1)	/* establish a stack frame */

However, the called function will save the caller's lr in the caller's
frame's lr save area, at -16(r1) to -32(r1).

This means that writes to the fdt variable will corrupt the saved link
register:

 0000000020c06018 l     O .bss   0000000000001000 _bss_stack
 0000000020c07018 l     O .bss   0000000000000008 fdt

We'll need at least 32 bytes in the initial stack frame, to handle the
LR save area. We bump this to 112 bytes, as that'll be the max required
by ABIv1.

Thanks to Alistair Popple for debugging help.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/boot/wrapper: use the pseries wrapper for zImage.epapr</title>
<updated>2015-03-16T07:58:32Z</updated>
<author>
<name>Jeremy Kerr</name>
<email>jk@ozlabs.org</email>
</author>
<published>2015-02-11T04:55:44Z</published>
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<id>urn:sha1:90d1d44e0de0ec833634667bc1827303b2e1645e</id>
<content type='text'>
We'll likely be entering the zImage.epapr as BE, so include the pseries
implementation of _zimage_start, which adds the endian fixup magic.

Although the endian fixup won't work on Book III-E machines starting LE,
the current entry point doesn't support LE anyway, so we shouldn't be
breaking anything.

Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
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