kernel/arch/powerpc/boot/dts/mpc8572ds.dtsi, branch linux-4.3.y

powerpc/85xx: Add phy nodes in SGMII mode for MPC8536/44/72DS & P2020DS

2012-07-12T15:08:09Z

In SGMII riser card different PHY chip are used with different external IRQ from eTSEC. To support PHY link state auto detect in SGMII mode we should add another group of PHY nodes for SGMII mode. For MPC8572DS IRQ6 is used for PHY0~PHY1, IRQ7 is used for PHY2~PHY3. For MPC8544DS and MPC8536DS IRQ6 is used for PHY0~PHY1. For P2020DS IRQ5 is used for PHY1~PHY2. Signed-off-by: Li Yang Signed-off-by: Jia Hongtao Signed-off-by: Kumar Gala

powerpc/85xx: Clean up partition nodes in dts for MPC8572DS

2012-03-16T15:46:33Z

Signed-off-by: Jin Qing Signed-off-by: Jia Hongtao Signed-off-by: Li Yang Signed-off-by: Kumar Gala

powerpc/85xx: Rework MPC8572DS device tree

2011-11-24T08:01:37Z

Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Removed CPU properties setup by u-boot to match other .dts * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Moved mdio nodes up one level instead of under tsec nodes * Added GPIO controller node to MPC8572 SoC template * Dropping "fsl,mpc8572-IP..." from compatibles for standard blocks Signed-off-by: Kumar Gala