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<title>kernel/arch/openrisc/include/asm/bitops/atomic.h, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
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<updated>2017-02-24T19:12:38Z</updated>
<entry>
<title>openrisc: add atomic bitops</title>
<updated>2017-02-24T19:12:38Z</updated>
<author>
<name>Stefan Kristiansson</name>
<email>stefan.kristiansson@saunalahti.fi</email>
</author>
<published>2014-05-12T11:08:26Z</published>
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<content type='text'>
This utilize the load-link/store-conditional l.lwa and l.swa
instructions to implement the atomic bitops.
When those instructions are not available emulation is provided.

Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Signed-off-by: Stefan Kristiansson &lt;stefan.kristiansson@saunalahti.fi&gt;
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666, implement
test_and_change_bit]
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
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</entry>
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