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<title>kernel/arch/mips/include/asm/mmu_context.h, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
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<updated>2020-10-27T15:02:36Z</updated>
<entry>
<title>mips: use asm-generic/mmu_context.h for no-op implementations</title>
<updated>2020-10-27T15:02:36Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2020-09-01T14:15:27Z</published>
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<id>urn:sha1:5b3a582d94e2aaa4a6d3c013eec3cc3e5750656d</id>
<content type='text'>
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Acked-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: linux-mips@vger.kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>MIPS: MemoryMapID (MMID) Support</title>
<updated>2019-02-04T18:56:41Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:28Z</published>
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<id>urn:sha1:c8790d657b0a8d42801fb4536f6f106b4b6306e8</id>
<content type='text'>
Introduce support for using MemoryMapIDs (MMIDs) as an alternative to
Address Space IDs (ASIDs). The major difference between the two is that
MMIDs are global - ie. an MMID uniquely identifies an address space
across all coherent CPUs. In contrast ASIDs are non-global per-CPU IDs,
wherein each address space is allocated a separate ASID for each CPU
upon which it is used. This global namespace allows a new GINVT
instruction be used to globally invalidate TLB entries associated with a
particular MMID across all coherent CPUs in the system, removing the
need for IPIs to invalidate entries with separate ASIDs on each CPU.

The allocation scheme used here is largely borrowed from arm64 (see
arch/arm64/mm/context.c). In essence we maintain a bitmap to track
available MMIDs, and MMIDs in active use at the time of a rollover to a
new MMID version are preserved in the new version. The allocation scheme
requires efficient 64 bit atomics in order to perform reasonably, so
this support depends upon CONFIG_GENERIC_ATOMIC64=n (ie. currently it
will only be included in MIPS64 kernels).

The first, and currently only, available CPU with support for MMIDs is
the MIPS I6500. This CPU supports 16 bit MMIDs, and so for now we cap
our MMIDs to 16 bits wide in order to prevent the bitmap growing to
absurd sizes if any future CPU does implement 32 bit MMIDs as the
architecture manuals suggest is recommended.

When MMIDs are in use we also make use of GINVT instruction which is
available due to the global nature of MMIDs. By executing a sequence of
GINVT &amp; SYNC 0x14 instructions we can avoid the overhead of an IPI to
each remote CPU in many cases. One complication is that GINVT will
invalidate wired entries (in all cases apart from type 0, which targets
the entire TLB). In order to avoid GINVT invalidating any wired TLB
entries we set up, we make sure to create those entries using a reserved
MMID (0) that we never associate with any address space.

Also of note is that KVM will require further work in order to support
MMIDs &amp; GINVT, since KVM is involved in allocating IDs for guests &amp; in
configuring the MMU. That work is not part of this patch, so for now
when MMIDs are in use KVM is disabled.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Add set_cpu_context() for ASID assignments</title>
<updated>2019-02-04T18:56:33Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:25Z</published>
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<id>urn:sha1:0b317c389c6771cbe1c5a12fe9322285a808a9bd</id>
<content type='text'>
When we gain MMID support we'll be storing MMIDs as atomic64_t values
and accessing them via atomic64_* functions. This necessitates that we
don't use cpu_context() as the left hand side of an assignment, ie. as a
modifiable lvalue. In preparation for this introduce a new
set_cpu_context() function &amp; replace all assignments with cpu_context()
on their left hand side with an equivalent call to set_cpu_context().

To enforce that cpu_context() should not be used for assignments, we
rewrite it as a static inline function.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Unify ASID version checks</title>
<updated>2019-02-04T18:56:30Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:25Z</published>
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<id>urn:sha1:42d5b846574f0904dbaf9dbdea4f19402589cddf</id>
<content type='text'>
Introduce a new check_mmu_context() function to check an mm's ASID
version &amp; get a new one if it's outdated, and a
check_switch_mmu_context() function which additionally sets up the new
ASID &amp; page directory. Simplify switch_mm() &amp; various
get_new_mmu_context() callsites in MIPS KVM by making use of the new
functions, which will help reduce the amount of code that requires
modification to gain MMID support.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Un-inline get_new_mmu_context</title>
<updated>2019-02-04T18:56:28Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:24Z</published>
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<id>urn:sha1:4ebea49ce233ce76421250f113a75d6d33c90e22</id>
<content type='text'>
In preparation for adding MMID support to get_new_mmu_context() which
will increase the size of the function somewhat, move it from
asm/mmu_context.h into a C file.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Move drop_mmu_context() comment into appropriate block</title>
<updated>2019-02-04T18:56:20Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:20Z</published>
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<id>urn:sha1:6067d47e36f4a3aa691f7b1f91e438cd289ecb8f</id>
<content type='text'>
drop_mmu_context() is preceded by a comment indicating what happens if
the mm provided is currently active on the local CPU. Move that comment
into the block that executes in this case, adjusting slightly to reflect
its new location.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Consolidate drop_mmu_context() has-ASID checks</title>
<updated>2019-02-04T18:56:18Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:19Z</published>
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<id>urn:sha1:c9b2a3dc240c444b4f7b556e2cce756828720856</id>
<content type='text'>
If an mm does not have an ASID on the local CPU then drop_mmu_context()
is always redundant, since there's no context to "drop". Various callers
of drop_mmu_context() check whether the mm has been allocated an ASID
before making the call. Move that check into drop_mmu_context() and
remove it from callers to simplify them.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Avoid HTW stop/start when dropping an inactive mm</title>
<updated>2019-02-04T18:56:16Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:18Z</published>
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<id>urn:sha1:67741ba3ba006558ac3541488c1db9dff9507e73</id>
<content type='text'>
If drop_mmu_context() is called with an mm that is not currently active
on the local CPU then there's no need for us to stop &amp; start a hardware
page table walker because it can't be fetching entries for the ASID
corresponding to the mm we're operating on.

Move the htw_stop() &amp; htw_start() calls into the block which we run only
if the mm is currently active, in order to avoid the redundant work.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Remove redundant get_new_mmu_context() cpu argument</title>
<updated>2019-02-04T18:56:14Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:17Z</published>
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<id>urn:sha1:4739f7dd99d757fb719e1173b4d2bcfc0f93e52d</id>
<content type='text'>
get_new_mmu_context() accepts a cpu argument, but implicitly assumes
that this is always equal to smp_processor_id() by operating on the
local CPU's TLB &amp; icache.

Remove the cpu argument and have get_new_mmu_context() call
smp_processor_id() instead.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: mm: Remove redundant drop_mmu_context() cpu argument</title>
<updated>2019-02-04T18:56:12Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-02-02T01:43:16Z</published>
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<id>urn:sha1:9a27324fde5d67cbadafff8f24ad65c49376f1f0</id>
<content type='text'>
The drop_mmu_context() function accepts a cpu argument, but it
implicitly expects that this is always equal to smp_processor_id() by
allocating &amp; configuring an ASID on the local CPU when the mm is active
on the CPU indicated by the cpu argument.

All callers do provide the value of smp_processor_id() to the cpu
argument.

Remove the redundant argument and have drop_mmu_context() call
smp_processor_id() itself, making it clearer that the cpu variable
always represents the local CPU.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
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