<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/mips/include/asm/mach-ip30, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2022-05-04T20:23:18Z</updated>
<entry>
<title>MIPS: IP30: Remove incorrect `cpu_has_fpu' override</title>
<updated>2022-05-04T20:23:18Z</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@orcam.me.uk</email>
</author>
<published>2022-05-01T22:14:22Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f44b3e74c33fe04defeff24ebcae98c3bcc5b285'/>
<id>urn:sha1:f44b3e74c33fe04defeff24ebcae98c3bcc5b285</id>
<content type='text'>
Remove unsupported forcing of `cpu_has_fpu' to 1, which makes the `nofpu'
kernel parameter non-functional, and also causes a link error:

ld: arch/mips/kernel/traps.o: in function `trap_init':
./arch/mips/include/asm/msa.h:(.init.text+0x348): undefined reference to `handle_fpe'
ld: ./arch/mips/include/asm/msa.h:(.init.text+0x354): undefined reference to `handle_fpe'
ld: ./arch/mips/include/asm/msa.h:(.init.text+0x360): undefined reference to `handle_fpe'

where the CONFIG_MIPS_FP_SUPPORT configuration option has been disabled.

Signed-off-by: Maciej W. Rozycki &lt;macro@orcam.me.uk&gt;
Reported-by: Stephen Zhang &lt;starzhangzsd@gmail.com&gt;
Fixes: 7505576d1c1a ("MIPS: add support for SGI Octane (IP30)")
Cc: stable@vger.kernel.org # v5.5+
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove TX39XX support</title>
<updated>2022-03-01T09:07:22Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2022-02-22T09:04:28Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=455481fc9a807798eca05f6fb0918ab88109d845'/>
<id>urn:sha1:455481fc9a807798eca05f6fb0918ab88109d845</id>
<content type='text'>
No (active) developer owns this hardware, so let's remove Linux support.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Tested-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
</content>
</entry>
<entry>
<title>MIPS: SGI-IP30: Move irq bits to better header files</title>
<updated>2020-09-21T20:15:49Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-09-20T20:51:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7895d662bab8827176d44326d0a7423221287ca9'/>
<id>urn:sha1:7895d662bab8827176d44326d0a7423221287ca9</id>
<content type='text'>
Move HEART specific parts of mach-ip30/irq.h to asm/sgi/heart.h and IP30
specific parts to sgi-ip30/ip30-common.h.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove mach-*/war.h</title>
<updated>2020-09-07T20:25:27Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=601637e42df045ca2d1a9324d56765f044d46866'/>
<id>urn:sha1:601637e42df045ca2d1a9324d56765f044d46866</id>
<content type='text'>
After conversion of all WAR defines we can now remove all mach-*/war.h
files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Get rid of BCM1250_M3_WAR</title>
<updated>2020-09-07T20:25:03Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:52Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ab5743079b8e3d3d4309664903f6b1f579168a56'/>
<id>urn:sha1:ab5743079b8e3d3d4309664903f6b1f579168a56</id>
<content type='text'>
BCM1250_M3_WAR is depending on CONFIG_CONFIG_SB1_PASS_2_WORKAROUNDS.
So using this option directly lets and remove define.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS</title>
<updated>2020-09-07T20:24:51Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=43df4eb2fc9511e09c66252c3fec4f8933a77c73'/>
<id>urn:sha1:43df4eb2fc9511e09c66252c3fec4f8933a77c73</id>
<content type='text'>
SB1250 uart bug is related to PASS 2 workarounds. Use config
CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config option</title>
<updated>2020-09-07T20:24:40Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a7fbed988f31d3bf92415226fdf2ffd54606ad93'/>
<id>urn:sha1:a7fbed988f31d3bf92415226fdf2ffd54606ad93</id>
<content type='text'>
Use a new config option to enable MIPS 34K ITLB workaround and remove
define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert R10000_LLSC_WAR info a config option</title>
<updated>2020-09-07T20:24:27Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:49Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=256ec489f1c7726f0db9ffee88ba7cdc317806cd'/>
<id>urn:sha1:256ec489f1c7726f0db9ffee88ba7cdc317806cd</id>
<content type='text'>
Use a new config option to enabel R1000_LLSC workaound and remove
define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config option</title>
<updated>2020-09-07T20:24:19Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:48Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=886ee1363a3ad2b890959f07cffe8d91d995b93a'/>
<id>urn:sha1:886ee1363a3ad2b890959f07cffe8d91d995b93a</id>
<content type='text'>
Use a new config option to enable I-cache refill workaround and remove
define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config option</title>
<updated>2020-09-07T20:24:09Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:47Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b'/>
<id>urn:sha1:24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b</id>
<content type='text'>
Use a new config option to enable TX49XX I-cache index invalidate
workaround and remove define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
</feed>
