<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/mips/include/asm/mach-ar7/ar7.h, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2022-09-19T14:37:27Z</updated>
<entry>
<title>MIPS: AR7: remove orphan declarations from arch/mips/include/asm/mach-ar7/ar7.h</title>
<updated>2022-09-19T14:37:27Z</updated>
<author>
<name>Gaosheng Cui</name>
<email>cuigaosheng1@huawei.com</email>
</author>
<published>2022-09-15T13:21:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5c5a4682e96a424c7d6b071b5832b5068ce29107'/>
<id>urn:sha1:5c5a4682e96a424c7d6b071b5832b5068ce29107</id>
<content type='text'>
All uses of ar7_cpu_clock, ar7_bus_clock and ar7_dsp_clock were
removed by commit 780019ddf02f ("MIPS: AR7: Implement clock API"),
so remove the orphan declarations, too.

Signed-off-by: Gaosheng Cui &lt;cuigaosheng1@huawei.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: ar7: convert to CONFIG_COMMON_CLK</title>
<updated>2021-06-08T15:00:09Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2021-05-31T13:22:37Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b408b611eb951594691abfee8ca687b405d27757'/>
<id>urn:sha1:b408b611eb951594691abfee8ca687b405d27757</id>
<content type='text'>
Perform a minimal conversion of the ar7 clock implementation to the common
clock framework. While the hardware can control the rates, this is left
unchanged, and all clocks are registered as fixed-rate or fixed-divider
clocks. Similarly, the clkdev lookup information is left unchanged but
moved from the table format into individual allocations.

There is a small increase in code size:

   text	   data	    bss	    dec	    hex	filename
4757116	 596640	  91328	5445084	 5315dc	vmlinux-before
4806159	 602360	  91344	5499863	 53ebd7	vmlinux-after

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 102</title>
<updated>2019-05-24T15:39:00Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-23T09:14:39Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fd534e9b5fdcf9bab33c03cb3ade1a1ae5b23c20'/>
<id>urn:sha1:fd534e9b5fdcf9bab33c03cb3ade1a1ae5b23c20</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  51 franklin st fifth floor boston ma 02110 1301 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 50 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190523091649.499889647@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove all the uses of custom gpio.h</title>
<updated>2015-09-03T10:08:02Z</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-08-02T16:30:11Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=832f5dacfa0bb081a3b3b979a36a132b28ffacf3'/>
<id>urn:sha1:832f5dacfa0bb081a3b3b979a36a132b28ffacf3</id>
<content type='text'>
Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
machines, and each machine type provides its own gpio.h. However
only a handful really implement the GPIO API, most just forward
everythings to gpiolib.

The Alchemy machine is notable as it provides a system to allow
implementing the GPIO API at the board level. But it is not used by
any board currently supported, so it can also be removed.

For most machine types we can just remove the custom gpio.h, as well
as the custom wrappers if some exists. Some of the code found in
the wrappers must be moved to the respective GPIO driver.

A few more fixes are need in some drivers as they rely on linux/gpio.h
to provides some machine specific definitions, or used asm/gpio.h
instead of linux/gpio.h for the gpio API.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Cc: Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;
Cc: Tejun Heo &lt;tj@kernel.org&gt;
Cc: Alexandre Courbot &lt;gnurou@gmail.com&gt;
Cc: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;
Cc: Florian Fainelli &lt;florian@openwrt.org&gt;
Cc: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Joe Perches &lt;joe@perches.com&gt;
Cc: Daniel Walter &lt;dwalter@google.com&gt;
Cc: Sergey Ryazanov &lt;ryazanov.s.a@gmail.com&gt;
Cc: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: James Hartley &lt;james.hartley@imgtec.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Jiri Kosina &lt;jkosina@suse.cz&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: Varka Bhadram &lt;varkabhadram@gmail.com&gt;
Cc: Masanari Iida &lt;standby24x7@gmail.com&gt;
Cc: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
Cc: Michael Buesch &lt;m@bues.ch&gt;
Cc: abdoulaye berthe &lt;berthe.ab@gmail.com&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-ide@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10828/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7034228792cc561e79ff8600f02884bd4c80e287'/>
<id>urn:sha1:7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: AR7: Fix loops per jiffies on TNETD7200 devices</title>
<updated>2010-12-16T18:10:56Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2010-10-31T22:49:58Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0bc6791707694c77b3543de39f77972a65de917a'/>
<id>urn:sha1:0bc6791707694c77b3543de39f77972a65de917a</id>
<content type='text'>
TNETD7200 run their CPU clock faster than the default CPU clock we assume.
In order to have the correct loops per jiffies settings, initialize clocks right
before setting mips_hpt_frequency. As a side effect, we can no longer use
msleep in clocks.c which requires other parts of the kernel to be initialized,
so replace these with mdelay.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1749/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: AR7: Fix double ar7_gpio_init declaration</title>
<updated>2010-12-16T18:10:56Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2010-10-31T22:49:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ff42d62047e45075c54a5543bd4f110dfd032d11'/>
<id>urn:sha1:ff42d62047e45075c54a5543bd4f110dfd032d11</id>
<content type='text'>
Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1748/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant</title>
<updated>2010-10-29T18:08:46Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2010-08-29T15:08:44Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=238dd317f74250983aefbde6dc0a1f345a717993'/>
<id>urn:sha1:238dd317f74250983aefbde6dc0a1f345a717993</id>
<content type='text'>
Add support for Titan TNETV1050,1055,1056,1060 variants. This SoC is almost
completely identical to AR7 except on a few points:
- a second bank of gpios is available
- vlynq0 on titan is vlynq1 on ar7
- different PHY addresses for cpmac0

This SoC can be found on commercial products like the Linksys WRTP54G

Original patch by Xin with improvments by Florian.

Signed-off-by: Xin Zhen &lt;xlonestar2000@aim.com&gt;
Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1563/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
</entry>
<entry>
<title>MIPS: AR7: Initialize GPIO earlier</title>
<updated>2010-10-29T18:08:46Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2010-08-29T15:08:41Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3bc6968adc7b1926f4582a33a33ad42d9b302ce0'/>
<id>urn:sha1:3bc6968adc7b1926f4582a33a33ad42d9b302ce0</id>
<content type='text'>
In order to detect the Titan variant, we must initialize GPIOs earlier since
detection relies on some GPIO values to be set.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1562/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
</entry>
<entry>
<title>MIPS: AR7: Fix typo in ar7.h</title>
<updated>2010-07-05T16:17:18Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2010-05-16T13:25:30Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e1df057df814a4a70a8711c0226a1d178c33edaa'/>
<id>urn:sha1:e1df057df814a4a70a8711c0226a1d178c33edaa</id>
<content type='text'>
This fixes a typo on the AR7_RESET_PERIPHERAL define.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1247/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
