<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/mips/include/asm/asm.h, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
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<updated>2018-10-16T06:11:14Z</updated>
<entry>
<title>MIPS: Remove unused PREF, PREFE &amp; PREFX macros</title>
<updated>2018-10-16T06:11:14Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2018-10-15T18:33:23Z</published>
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<id>urn:sha1:7f8502a539bbfca7c3027e0279060eb46dfde59f</id>
<content type='text'>
asm/asm.h provides PREF(), PREFE() &amp; PREFX() macros which are now
entirely unused. Delete the dead code.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/20908/
Cc: linux-mips@linux-mips.org
</content>
</entry>
<entry>
<title>MIPS: Remove unused CAT macro</title>
<updated>2018-10-16T06:11:13Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2018-10-15T18:33:21Z</published>
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<id>urn:sha1:e2b405439903b20675de30090aab0fcadef5bbba</id>
<content type='text'>
asm/asm.h provides a CAT macro which is unused throughout the tree, and
if anyone wanted it the generic CONCATENATE macro in linux/kernel.h
provides the same functionality. Delete the dead code.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/20905/
Cc: linux-mips@linux-mips.org
</content>
</entry>
<entry>
<title>MIPS: Remove unused TTABLE macro</title>
<updated>2018-10-16T06:11:13Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2018-10-15T18:33:20Z</published>
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<id>urn:sha1:da1d25e79a46fab38c73570bd7c3a0f545fbbb9d</id>
<content type='text'>
asm/asm.h contains a TTABLE macro to generate "text tables" which would
appear to be arrays of pointers to strings. It is unused throughout the
kernel tree, so delete the dead code.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/20904/
Cc: linux-mips@linux-mips.org
</content>
</entry>
<entry>
<title>MIPS: Remove unused PIC macros</title>
<updated>2018-10-16T06:11:12Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2018-10-15T18:33:19Z</published>
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<id>urn:sha1:fce362c7fc3f89687b4b0eecefd7de8baa91a679</id>
<content type='text'>
asm/asm.h contains CPRESTORE, CPADD &amp; CPLOAD macros that are intended
for use with position independent code, but are not used anywhere in the
kernel - along with a comment to that effect. Remove the dead code.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/20903/
Cc: linux-mips@linux-mips.org
</content>
</entry>
<entry>
<title>MIPS: Remove unused MOVN &amp; MOVZ macros</title>
<updated>2018-10-16T06:11:12Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2018-10-15T18:33:19Z</published>
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<id>urn:sha1:7b2d13f2e24002c5113d30993c5297cb4fea1437</id>
<content type='text'>
We have macros in asm/asm.h to allow for use of the MOVN &amp; MOVZ
instructions with compare-and-branch sequences providing compatibility
for ISA versions which don't include those instructions. However the
macros are unused, and appear to have always been unused. Delete the
dead code.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/20909/
Cc: linux-mips@linux-mips.org
</content>
</entry>
<entry>
<title>MIPS: Add DWARF unwinding to assembly</title>
<updated>2017-09-06T09:01:52Z</updated>
<author>
<name>Corey Minyard</name>
<email>cminyard@mvista.com</email>
</author>
<published>2017-08-10T18:27:39Z</published>
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<id>urn:sha1:866b6a89c6d1876fce25c152ef9f887b41ffcf7f</id>
<content type='text'>
This will allow kdump dumps to work correclty with MIPS and
future DWARF unwinding of the stack to give accurate tracebacks.

Signed-off-by: Corey Minyard &lt;cminyard@mvista.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16990/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: End asm function prologue macros with .insn</title>
<updated>2017-01-03T15:34:49Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-11-07T11:14:09Z</published>
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<id>urn:sha1:08889582b8aa0bbc01a1e5a0033b9f98d2e11caa</id>
<content type='text'>
When building a kernel targeting a microMIPS ISA, recent GNU linkers
will fail the link if they cannot determine that the target of a branch
or jump is microMIPS code, with errors such as the following:

    mips-img-linux-gnu-ld: arch/mips/built-in.o: .text+0x542c:
    Unsupported jump between ISA modes; consider recompiling with
    interlinking enabled.
    mips-img-linux-gnu-ld: final link failed: Bad value

or:

    ./arch/mips/include/asm/uaccess.h:1017: warning: JALX to a
    non-word-aligned address

Placing anything other than an instruction at the start of a function
written in assembly appears to trigger such errors. In order to prepare
for allowing us to follow function prologue macros with an EXPORT_SYMBOL
invocation, end the prologue macros (LEAD, NESTED &amp; FEXPORT) with a
.insn directive. This ensures that the start of the function is marked
as code, which always makes sense for functions &amp; safely prevents us
from hitting the link errors described above.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Reviewed-by: Maciej W. Rozycki &lt;macro@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14508/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Fix gigaton of warning building with microMIPS.</title>
<updated>2014-03-31T16:17:12Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-03-30T11:20:10Z</published>
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<id>urn:sha1:a809d46066d5171ed446d59a51cd1e57d99fcfc3</id>
<content type='text'>
With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III
mode through .set mips3 results in *lots* of warnings like

{standard input}: Assembler messages:
{standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension

during a kernel build.  Fixed by using .set arch=r4000 instead.

This breaks support for building the kernel with binutils 2.13 which
was supported for 32 bit kernels only anyway and 2.14 which was a bad
vintage for MIPS anyway.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: asm: Add wrappers for EVA/non-EVA instructions</title>
<updated>2014-03-26T22:09:12Z</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2013-12-04T13:56:03Z</published>
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<id>urn:sha1:932449459522ef879c6d6a8fa707d801bdd8080e</id>
<content type='text'>
EVA uses specific instructions for accessing user memory.
Instead of polluting the kernel with numerous #ifdef CONFIG_EVA
we add wrappers for all the instructions that need special
handling when EVA is enabled.

Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: asm: Add prefetch instruction for EVA</title>
<updated>2014-03-26T22:09:12Z</updated>
<author>
<name>Leonid Yegoshin</name>
<email>Leonid.Yegoshin@imgtec.com</email>
</author>
<published>2013-12-03T10:48:15Z</published>
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<id>urn:sha1:5b736cd243f942d474621a7521e08b34b8e4197b</id>
<content type='text'>
EVA can use the PREFE instruction to perform the virtual address
translation using the user mapping of the address rather than the
kernel mapping.

Signed-off-by: Leonid Yegoshin &lt;Leonid.Yegoshin@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</content>
</entry>
</feed>
