<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/mips/include/asm/Kbuild, branch linux-4.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.15.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.15.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2017-11-28T15:53:24Z</updated>
<entry>
<title>MIPS: Add custom serial.h with BASE_BAUD override for generic kernel</title>
<updated>2017-11-28T15:53:24Z</updated>
<author>
<name>Matt Redfearn</name>
<email>matt.redfearn@mips.com</email>
</author>
<published>2017-11-28T15:22:20Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=c8ec2041f549e7f2dee0c34d25381be6f7805f99'/>
<id>urn:sha1:c8ec2041f549e7f2dee0c34d25381be6f7805f99</id>
<content type='text'>
Add a custom serial.h header for MIPS, allowing platforms to override
the asm-generic version if required.

The generic platform uses this header to set BASE_BAUD to 0. The
generic platform supports multiple boards, which may have different
UART clocks. Also one of the boards supported is the Boston FPGA board,
where the UART clock depends on the loaded FPGA bitfile. As such there
is no way that the generic kernel can set a compile time default
BASE_BAUD.

Commit 31cb9a8575ca ("earlycon: initialise baud field of earlycon device
structure") changed the behavior of of_setup_earlycon such that any baud
rate set in the device tree is now set in the earlycon structure. The
UART driver will then calculate a divisor based on BASE_BAUD and set it.
With MIPS generic kernels this resulted in garbage output due to the
incorrect uart clock rate being used to calculate a divisor. This
commit, combined with "serial: 8250_early: Only set divisor if valid clk
&amp; baud" prevents the earlycon code setting a bad divisor and restores
earlycon output.

Fixes: 31cb9a8575ca ("earlycon: initialise baud field of earlycon device structure")
Cc: stable &lt;stable@vger.kernel.org&gt; # 4.14
Signed-off-by: Matt Redfearn &lt;matt.redfearn@mips.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Use queued spinlocks (qspinlock)</title>
<updated>2017-06-29T00:42:26Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2017-06-10T00:26:43Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0b17c9670590148656645be57f62f279f0d3ad52'/>
<id>urn:sha1:0b17c9670590148656645be57f62f279f0d3ad52</id>
<content type='text'>
This patch switches MIPS to make use of generically implemented queued
spinlocks, rather than the ticket spinlocks used previously. This allows
us to drop a whole load of inline assembly, share more generic code, and
is also a performance win.

Results from running the AIM7 short workload on a MIPS Creator Ci40 (ie.
2 core 2 thread interAptiv CPU clocked at 546MHz) with v4.12-rc4
pistachio_defconfig, with ftrace disabled due to a current bug, and both
with &amp; without use of queued rwlocks &amp; spinlocks:

  Forks | v4.12-rc4 | +qlocks  | Change
 -------|-----------|----------|--------
     10 | 52630.32  | 53316.31 | +1.01%
     20 | 51777.80  | 52623.15 | +1.02%
     30 | 51645.92  | 52517.26 | +1.02%
     40 | 51634.88  | 52419.89 | +1.02%
     50 | 51506.75  | 52307.81 | +1.02%
     60 | 51500.74  | 52322.72 | +1.02%
     70 | 51434.81  | 52288.60 | +1.02%
     80 | 51423.22  | 52434.85 | +1.02%
     90 | 51428.65  | 52410.10 | +1.02%

The kernels used for these tests also had my "MIPS: Hardcode cpu_has_*
where known at compile time due to ISA" patch applied, which allows the
kernel_uses_llsc checks in cmpxchg() &amp; xchg() to be optimised away at
compile time.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16358/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Use queued read/write locks (qrwlock)</title>
<updated>2017-06-29T00:42:25Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2017-06-10T00:26:42Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=25da4e9dedbfa1630cc87903dcced5b249b936ef'/>
<id>urn:sha1:25da4e9dedbfa1630cc87903dcced5b249b936ef</id>
<content type='text'>
This patch switches MIPS to make use of generically implemented queued
read/write locks, rather than the custom implementation used previously.
This allows us to drop a whole load of inline assembly, share more
generic code, and is also a performance win.

Results from running the AIM7 short workload on a MIPS Creator Ci40 (ie.
2 core 2 thread interAptiv CPU clocked at 546MHz) with v4.12-rc4
pistachio_defconfig, with ftrace disabled due to a current bug, and both
with &amp; without use of queued rwlocks &amp; spinlocks:

  Forks | v4.12-rc4 | +qlocks  | Change
 -------|-----------|----------|--------
     10 | 52630.32  | 53316.31 | +1.01%
     20 | 51777.80  | 52623.15 | +1.02%
     30 | 51645.92  | 52517.26 | +1.02%
     40 | 51634.88  | 52419.89 | +1.02%
     50 | 51506.75  | 52307.81 | +1.02%
     60 | 51500.74  | 52322.72 | +1.02%
     70 | 51434.81  | 52288.60 | +1.02%
     80 | 51423.22  | 52434.85 | +1.02%
     90 | 51428.65  | 52410.10 | +1.02%

The kernels used for these tests also had my "MIPS: Hardcode cpu_has_*
where known at compile time due to ISA" patch applied, which allows the
kernel_uses_llsc checks in cmpxchg() &amp; xchg() to be optimised away at
compile time.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16357/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mips_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips</title>
<updated>2017-02-21T22:21:11Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-02-21T22:21:11Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0f002fddbe150ec3f2afce3fc09de5bda3096c72'/>
<id>urn:sha1:0f002fddbe150ec3f2afce3fc09de5bda3096c72</id>
<content type='text'>
Pull MIPS updates from James Hogan:
 "Here's the main MIPS pull request for 4.11.

  It contains a few new features such as IRQ stacks, cacheinfo support,
  and KASLR for Octeon CPUs, and a variety of smaller improvements and
  fixes including devicetree additions, kexec cleanups, microMIPS stack
  unwinding fixes, and a bunch of build fixes to clean up continuous
  integration builds.

  Its all been in linux-next for at least a couple of days, most of it
  far longer.

  Miscellaneous:
   - Add IRQ stacks
   - Add cacheinfo support
   - Add "uzImage.bin" zboot target
   - Unify performance counter definitions
   - Export various (mainly assembly) symbols alongside their
     definitions
   - Audit and remove unnecessary uses of module.h

  kexec &amp; kdump:
   - Lots of improvements and fixes
   - Add correct copy_regs implementations
   - Add debug logging of new kernel information

  Security:
   - Use Makefile.postlink to insert relocations into vmlinux
   - Provide plat_post_relocation hook (used for Octeon KASLR)
   - Add support for tuning mmap randomisation
   - Relocate DTB

  microMIPS:
   - A load of unwind fixes
   - Add some missing .insn to fix link errors

  MIPSr6:
   - Fix MULTU/MADDU/MSUBU sign extension in r2 emulation
   - Remove r2_emul_return and use ERETNC unconditionally on MIPSr6
   - Allow pre-r6 emulation on SMP MIPSr6 kernels

  Cache management:
   - Treat physically indexed dcache as non-aliasing
   - Add return errors to protected cache ops for KVM
   - CM3: Ensure L1 &amp; L2 cache ECC checking matches
   - CM3: Indicate inclusive caches
   - I6400: Treat dcache as physically indexed

  Memory management:
   - Ensure bootmem doesn't corrupt reserved memory
   - Export some TLB exception generation functions for KVM

  OF:
   - NULL check initial_boot_params before use in of_scan_flat_dt()
   - Fix unaligned access in of_alias_scan()

  SMP:
   - CPS: Don't BUG if a CPU fails to start

  Other fixes:
   - Fix longstanding 64-bit IP checksum carry bug
   - Fix KERN_CONT fallout in cpu-bugs64.c and sync-r4k.c
   - Update defconfigs for NF_CT_PROTO_DCCP, DPLITE,
     CPU_FREQ_STAT,SCSI_DH changes
   - Disable certain builtin compiler options, stack-check (whole
     kernel), asynchronous-unwind-tables (VDSO).
   - A bunch of build fixes from kernelci.org testing
   - Various other minor cleanups &amp; corrections

  BMIPS:
   - Migrate interrupts during bmips_cpu_disable
   - BCM47xx: Add Luxul devices
   - BCM47xx: Fix Asus WL-500W button inversion
   - BCM7xxx: Add SPI device nodes

  Generic (multiplatform):
   - Add kexec DTB passing
   - Fix big endian
   - Add cpp_its_S in ksym_dep_filter to silence build warning

  IP22:
   - Reformat inline assembler code to modern standards
   - Fix binutils 2.25 build error

  IP27:
   - Fix duplicate CAC_BASE definition build error
   - Disable qlge driver to workaround broken compiler

  Lantiq:
   - Refresh defconfig and activate more drivers
   - Lock DMA register access
   - Fix cascading IRQ setup
   - Fix build of VPE loader
   - xway: Fix ethernet packet header corruption over reboot

  Loongson1
   - Add watchdog support
   - 1B: Reduce DEFAULT_MEMSIZE to 64MB
   - 1B: Change OSC clock name to match rest of kernel
   - 1C: Remove ARCH_WANT_OPTIONAL_GPIOLIB

  Octeon:
   - Add KASLR support
   - Support Octeon III USB controller
   - Fix large copy_from_user corner case
   - Enable devtmpfs in defconfig

  Netlogic:
   - Fix non-default XLR build error due to netlogic,xlp-pic code
   - Fix assembler warning from smpboot.S

  pic32mzda:
   - Fix linker error when early printk is disabled

  Pistachio:
   - Add base device tree
   - Add Ci40 "Marduk" device tree

  Ralink:
   - Support raw appended DTB
   - Add missing I2C &amp; I2S clocks
   - Add missing pinmux and fix pinmux function name typo
   - Add missing clk_round_rate()
   - Clean up prom_init()
   - MT7621: Set SoC type
   - MT7621: Support highmem

  TXx9:
   - Modernize printing of kernel messages and resolve KERN_CONT fallout
   - 7segled: use permission-specific DEVICE_ATTR variants

  XilFPGA:
   - Add IRQ controller and UART IRQ
   - Add AXI I2C and emaclite to DT &amp; defconfig"

* tag 'mips_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (148 commits)
  MIPS: VDSO: Explicitly use -fno-asynchronous-unwind-tables
  MIPS: BCM47XX: Fix button inversion for Asus WL-500W
  MIPS: DTS: Add img directory to Makefile
  MIPS: ip27: Disable qlge driver in defconfig
  MIPS: pic32mzda: Fix linker error for pic32_get_pbclk()
  MIPS: Lantiq: Keep ethernet enabled during boot
  MIPS: OCTEON: Fix copy_from_user fault handling for large buffers
  MIPS: Fix special case in 64 bit IP checksumming.
  MIPS: OCTEON: Enable DEVTMPFS
  MIPS: lantiq: Set physical_memsize
  MIPS: sysmips: Remove duplicated include from syscall.c
  Kbuild: Add cpp_its_S in ksym_dep_filter
  MIPS: Audit and remove any unnecessary uses of module.h
  MIPS: Unify perf counter register definitions
  MIPS: Disable stack checks on MIPS kernels
  MIPS: OCTEON: Platform support for OCTEON III USB controller
  MIPS: Lantiq: Fix cascaded IRQ setup
  MIPS: sync-r4k: Fix KERN_CONT fallout
  MIPS: IRQ Stack: Fix erroneous jal to plat_irq_dispatch
  MIPS: Fix distclean with Makefile.postlink
  ...
</content>
</entry>
<entry>
<title>sched/cputime: Remove generic asm headers</title>
<updated>2017-02-01T08:14:07Z</updated>
<author>
<name>Frederic Weisbecker</name>
<email>fweisbec@gmail.com</email>
</author>
<published>2017-01-31T03:09:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b672592f022152155fde7db99aafbcf04a2c3ba5'/>
<id>urn:sha1:b672592f022152155fde7db99aafbcf04a2c3ba5</id>
<content type='text'>
cputime_t is now only used by two architectures:

	* powerpc (when CONFIG_VIRT_CPU_ACCOUNTING_NATIVE=y)
	* s390

And since the core doesn't use it anymore, we don't need any arch support
from the others. So we can remove their stub implementations.

A final cleanup would be to provide an efficient pure arch
implementation of cputime_to_nsec() for s390 and powerpc and finally
remove include/linux/cputime.h .

Signed-off-by: Frederic Weisbecker &lt;fweisbec@gmail.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
Cc: Heiko Carstens &lt;heiko.carstens@de.ibm.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Rik van Riel &lt;riel@redhat.com&gt;
Cc: Stanislaw Gruszka &lt;sgruszka@redhat.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Wanpeng Li &lt;wanpeng.li@hotmail.com&gt;
Link: http://lkml.kernel.org/r/1485832191-26889-36-git-send-email-fweisbec@gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Use generic asm/export.h</title>
<updated>2017-01-03T15:34:48Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-11-07T11:14:07Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=858e2b2310cac0dff1df8eea7d16b6ad7ef2c2b5'/>
<id>urn:sha1:858e2b2310cac0dff1df8eea7d16b6ad7ef2c2b5</id>
<content type='text'>
Include export.h in the list of generic headers used by the MIPS
architecture for use by later patches.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14506/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Use generic asm/unaligned.h</title>
<updated>2017-01-03T15:34:36Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-10-17T14:56:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ca0c40c38c3bd9be82601cc5623ea4cc8addc236'/>
<id>urn:sha1:ca0c40c38c3bd9be82601cc5623ea4cc8addc236</id>
<content type='text'>
The MIPS-specific asm/unaligned.h provides nothing that the generic
version doesn't - it simply uses MIPS-specific endianness macros in
place of generic ones &amp; lacks support for
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS. Remove it &amp; switch to using the
generic version to remove duplication.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Reviewed-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14412/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>locking/mutex: Kill arch specific code</title>
<updated>2016-10-25T09:31:51Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2016-08-23T11:36:04Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=890658b7ab48d1362a0362df842cecc73c83146f'/>
<id>urn:sha1:890658b7ab48d1362a0362df842cecc73c83146f</id>
<content type='text'>
Its all generic atomic_long_t stuff now.

Tested-by: Jason Low &lt;jason.low2@hpe.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Use generic clkdev.h header</title>
<updated>2016-05-13T12:01:58Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2016-01-27T22:23:36Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3d2ca73af4eb4a33ae021e37b5f395ac5631cb3f'/>
<id>urn:sha1:3d2ca73af4eb4a33ae021e37b5f395ac5631cb3f</id>
<content type='text'>
The generic header file is equivalent to the MIPS one, so use the
generic one instead.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12261/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'strscpy' of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile</title>
<updated>2015-10-04T15:31:13Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-10-04T15:31:13Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=30c44659f4a3e7e1f9f47e895591b4b40bf62671'/>
<id>urn:sha1:30c44659f4a3e7e1f9f47e895591b4b40bf62671</id>
<content type='text'>
Pull strscpy string copy function implementation from Chris Metcalf.

Chris sent this during the merge window, but I waffled back and forth on
the pull request, which is why it's going in only now.

The new "strscpy()" function is definitely easier to use and more secure
than either strncpy() or strlcpy(), both of which are horrible nasty
interfaces that have serious and irredeemable problems.

strncpy() has a useless return value, and doesn't NUL-terminate an
overlong result.  To make matters worse, it pads a short result with
zeroes, which is a performance disaster if you have big buffers.

strlcpy(), by contrast, is a mis-designed "fix" for strlcpy(), lacking
the insane NUL padding, but having a differently broken return value
which returns the original length of the source string.  Which means
that it will read characters past the count from the source buffer, and
you have to trust the source to be properly terminated.  It also makes
error handling fragile, since the test for overflow is unnecessarily
subtle.

strscpy() avoids both these problems, guaranteeing the NUL termination
(but not excessive padding) if the destination size wasn't zero, and
making the overflow condition very obvious by returning -E2BIG.  It also
doesn't read past the size of the source, and can thus be used for
untrusted source data too.

So why did I waffle about this for so long?

Every time we introduce a new-and-improved interface, people start doing
these interminable series of trivial conversion patches.

And every time that happens, somebody does some silly mistake, and the
conversion patch to the improved interface actually makes things worse.
Because the patch is mindnumbing and trivial, nobody has the attention
span to look at it carefully, and it's usually done over large swatches
of source code which means that not every conversion gets tested.

So I'm pulling the strscpy() support because it *is* a better interface.
But I will refuse to pull mindless conversion patches.  Use this in
places where it makes sense, but don't do trivial patches to fix things
that aren't actually known to be broken.

* 'strscpy' of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
  tile: use global strscpy() rather than private copy
  string: provide strscpy()
  Make asm/word-at-a-time.h available on all architectures
</content>
</entry>
</feed>
