kernel/arch/mips/ath79, branch linux-5.1.y

MIPS: perf: ath79: Fix perfcount IRQ assignment

2019-04-16T22:09:10Z

Currently it's not possible to use perf on ath79 due to genirq flags mismatch happening on static virtual IRQ 13 which is used for performance counters hardware IRQ 5. On TP-Link Archer C7v5: CPU0 2: 0 MIPS 2 ath9k 4: 318 MIPS 4 19000000.eth 7: 55034 MIPS 7 timer 8: 1236 MISC 3 ttyS0 12: 0 INTC 1 ehci_hcd:usb1 13: 0 gpio-ath79 2 keys 14: 0 gpio-ath79 5 keys 15: 31 AR724X PCI 1 ath10k_pci $ perf top genirq: Flags mismatch irq 13. 00014c83 (mips_perf_pmu) vs. 00002003 (keys) On TP-Link Archer C7v4: CPU0 4: 0 MIPS 4 19000000.eth 5: 7135 MIPS 5 1a000000.eth 7: 98379 MIPS 7 timer 8: 30 MISC 3 ttyS0 12: 90028 INTC 0 ath9k 13: 5520 INTC 1 ehci_hcd:usb1 14: 4623 INTC 2 ehci_hcd:usb2 15: 32844 AR724X PCI 1 ath10k_pci 16: 0 gpio-ath79 16 keys 23: 0 gpio-ath79 23 keys $ perf top genirq: Flags mismatch irq 13. 00014c80 (mips_perf_pmu) vs. 00000080 (ehci_hcd:usb1) This problem is happening, because currently statically assigned virtual IRQ 13 for performance counters is not claimed during the initialization of MIPS PMU during the bootup, so the IRQ subsystem doesn't know, that this interrupt isn't available for further use. So this patch fixes the issue by simply booking hardware IRQ 5 for MIPS PMU. Tested-by: Kevin 'ldir' Darbyshire-Bryant Signed-off-by: Petr Štetiar Acked-by: John Crispin Acked-by: Marc Zyngier Signed-off-by: Paul Burton Cc: linux-mips@vger.kernel.org Cc: Ralf Baechle Cc: James Hogan Cc: Thomas Gleixner Cc: Jason Cooper

MIPS: ath79: drop !OF clock code

2019-01-22T19:17:22Z

With the target now being fully OF based, we can drop the legacy clock registration code. All clocks are now probed via devicetree. Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Felix Fietkau

MIPS: ath79: drop platform device registration code

2019-01-22T19:17:22Z

With the target now being fully OF based, we can drop the legacy platform device registration code. All devices and their drivers are now probed via OF. Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Felix Fietkau

MIPS: ath79: drop legacy pci code

2019-01-22T19:17:22Z

With the target now being fully OF based, we can drop the legacy pci platform code. The only bits that we need to keep is the fixup code which we move to its own code file. Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Felix Fietkau

MIPS: ath79: drop machfiles

2019-01-22T19:17:22Z

With the target now being fully OF based, we can drop the legacy mach files. Boards can now boot fully of devicetree files. Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Felix Fietkau

MIPS: ath79: drop legacy IRQ code

2019-01-22T19:17:22Z

With the target now being fully OF based, we can drop the legacy IRQ code. All IRQs are now handled via the new irqchip drivers. Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Felix Fietkau

MIPS: ath79: export switch MDIO reference clock

2019-01-22T19:17:22Z

On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz clock. If that feature is not used, it defaults to the main reference clock, like on all other SoC. Signed-off-by: Felix Fietkau Signed-off-by: John Crispin Acked-by: Rob Herring Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org

MIPS: ath79: support setting up clock via DT on all SoC types

2019-01-22T19:17:21Z

Use the same functions as the legacy code Signed-off-by: Felix Fietkau Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org

MIPS: ath79: make specifying the reference clock in DT optional

2019-01-22T19:17:21Z

It can be autodetected for many SoCs using the strapping options. If the clock is specified in DT, the autodetected value is ignored Signed-off-by: Felix Fietkau Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org

MIPS: ath79: pass PLL base to clock init functions

2019-01-22T19:17:21Z

Preparation for passing the mapped base via DT Signed-off-by: Felix Fietkau Signed-off-by: John Crispin Signed-off-by: Paul Burton Cc: Ralf Baechle Cc: James Hogan Cc: Rob Herring Cc: Pengutronix Kernel Team Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org