<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/arm64/boot/dts/bitmain, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2020-12-10T14:35:15Z</updated>
<entry>
<title>arm64: dts: bitmain: Use generic "ngpios" rather than "snps,nr-gpios"</title>
<updated>2020-12-10T14:35:15Z</updated>
<author>
<name>Jisheng Zhang</name>
<email>Jisheng.Zhang@synaptics.com</email>
</author>
<published>2020-12-10T09:40:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=43ffe817bfe3871ffbaa1e98952a2a01b140e71e'/>
<id>urn:sha1:43ffe817bfe3871ffbaa1e98952a2a01b140e71e</id>
<content type='text'>
This is to remove similar errors as below:

OF: /.../gpio-port@0: could not find phandle

Commit 7569486d79ae ("gpio: dwapb: Add ngpios DT-property support")
explained the reason of above errors well and added the generic
"ngpios" property, let's use it.

Signed-off-by: Jisheng Zhang &lt;Jisheng.Zhang@synaptics.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://lore.kernel.org/r/20201210094056.54553-1-manivannan.sadhasivam@linaro.org'
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Source common clock for UART controllers</title>
<updated>2020-01-16T23:48:11Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2020-01-14T04:03:11Z</published>
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<id>urn:sha1:dee0be5c2138cee65706a939d03a366b790c4baa</id>
<content type='text'>
Remove fixed clock and source common clock for UART controllers.

Link: https://lore.kernel.org/r/20200114040311.6599-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Add clock controller support for BM1880 SoC</title>
<updated>2020-01-16T23:48:02Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2020-01-14T04:03:10Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e1cd7b804687ae15469ef2b6a19f9dd33046cc61'/>
<id>urn:sha1:e1cd7b804687ae15469ef2b6a19f9dd33046cc61</id>
<content type='text'>
Add clock controller support for Bitmain BM1880 SoC.

Link: https://lore.kernel.org/r/20200114040311.6599-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Modify pin controller memory map</title>
<updated>2019-08-03T12:21:21Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2019-05-16T10:42:43Z</published>
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<id>urn:sha1:ca33f735b1195e9bafaa66f24dec40ea666e9840</id>
<content type='text'>
Earlier, the PWM registers were included as part of the pinctrl memory
map, but this turned to be useless as the muxing is being handled by the
SoC pin controller itself. Hence, this commit removes the pwm register
mapping from the pinctrl node to make it more clean.

Fixes: af2ff87de413 ("arm64: dts: bitmain: Add pinctrl support for BM1880 SoC")
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Add reset controller support for BM1880 SoC</title>
<updated>2019-08-03T12:20:13Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2019-08-03T12:20:13Z</published>
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<id>urn:sha1:7d545e779a982d0b96939611db1bd8004f926ade</id>
<content type='text'>
Add reset controller support for Bitmain BM1880 SoC. This commit also
adds reset support to UART peripherals.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge</title>
<updated>2019-04-29T05:17:41Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2019-04-24T12:02:22Z</published>
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<id>urn:sha1:470fa42933dae396860a3409abee9e6c860382a2</id>
<content type='text'>
Add pinctrl support for UARTs exposed on the Sophon Edge board.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Add pinctrl support for BM1880 SoC</title>
<updated>2019-04-29T05:17:36Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2019-04-24T12:02:21Z</published>
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<id>urn:sha1:c1294fb5cb7804fb5c469c7b528a7d0fff2027c2</id>
<content type='text'>
Add pinctrl support for Bitmain BM1880 SoC. This SoC only supports
pinmuxing and the pinctrl registers are part of the sctrl block.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board</title>
<updated>2019-04-29T05:08:40Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2019-02-26T11:50:22Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9fe408413f501b3262e591f521bf7aff767f6eba'/>
<id>urn:sha1:9fe408413f501b3262e591f521bf7aff767f6eba</id>
<content type='text'>
Add GPIO line names for Sophon Edge board based on BM1880 SoC from
Bitmain. Line names are based on the board schematics as well as the
96Boards Consumer Edition specification v1.0.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Add GPIO support for BM1880 SoC</title>
<updated>2019-04-29T05:08:29Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2019-02-26T11:50:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=367e592788a2724f2558b8579ccf212cc9434158'/>
<id>urn:sha1:367e592788a2724f2558b8579ccf212cc9434158</id>
<content type='text'>
Add GPIO support for Bitmain BM1880 SoC based on Designware APB GPIO
controller IP. IP exposes 3 GPIO controllers with a total of 72 pins.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: bitmain: Add Sophon Egde board support</title>
<updated>2019-02-09T10:40:13Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2019-01-25T16:42:49Z</published>
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<id>urn:sha1:3bba4e2fdc2d6865b63d5e9dde2984033236420e</id>
<content type='text'>
Add devicetree support for Sophon Edge board from Bitmain based on
BM1880 SoC. This board is one of the 96Boards Consumer and AI platform.
More information about this board can be found in 96Boards product page:

https://www.96boards.org/documentation/consumer/sophon-edge/

Only UART peripheral support is enabled for now.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
