<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/arm/mach-sti, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2020-06-28T12:46:54Z</updated>
<entry>
<title>Revert "ARM: sti: Implement dummy L2 cache's write_sec"</title>
<updated>2020-06-28T12:46:54Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2020-06-18T17:24:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0f77ce26ebcf6ea384421d2dd47b924b83649692'/>
<id>urn:sha1:0f77ce26ebcf6ea384421d2dd47b924b83649692</id>
<content type='text'>
This reverts commit 7b8e0188fa717cd9abc4fb52587445b421835c2a.

Initially, STiH410-B2260 was supposed to be secured, that's why
l2c_write_sec was stubbed to avoid secure register access from
non secure world.

But by default, STiH410-B2260 is running in non secure mode,
so L2 cache register accesses are authorized, l2c_write_sec stub
is not needed.

With this patch, L2 cache is configured and performance are enhanced.

Link: https://lore.kernel.org/r/20200618172456.29475-1-patrice.chotard@st.com
Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: Alain Volmat &lt;alain.volmat@st.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500</title>
<updated>2019-06-19T15:09:55Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-04T08:11:33Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d2912cb15bdda8ba4a5dd73396ad62641af2f520'/>
<id>urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520</id>
<content type='text'>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>treewide: Add SPDX license identifier - Makefile/Kconfig</title>
<updated>2019-05-21T08:50:46Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-19T12:07:45Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1'/>
<id>urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: sti: remove pen_release and boot_lock</title>
<updated>2018-12-20T13:32:15Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2018-12-20T13:32:15Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=704cfd7f5f71c6bc6cdfaa63a16ed0f72882b1a1'/>
<id>urn:sha1:704cfd7f5f71c6bc6cdfaa63a16ed0f72882b1a1</id>
<content type='text'>
The pen_release implementation was created for Versatile platforms to
work around boot loaders that did not differentiate between the
various different secondary CPUs on this ARM development platform.
This should not be true of modern platforms where we send IPIs to
specific CPUs to wake them up.  Remove the pen_release stuff from
SoCs that make use of the per-CPU IPI mechanism.

The boot_lock is something that was required for ARM development
platforms to ensure that the delay calibration worked properly.  This
is not necessary for modern platforms that have better bus bandwidth
and do not need to calibrate the delay loop for secondary cores.
Remove the boot_lock entirely.

Due to pen_release and boot_lock removal, .smp_prepare_cpus and
.smp_boot_secondary STi callbacks must be reworked properly to
allow secondary CPU bring up.

Secondary CPU is initialized and started by a U-BOOTROM firmware.
Secondary CPU is spinning and waiting for a write at cpu_strt_ptr.
Writing secondary_startup address at cpu_strt_ptr makes it to
jump directly to secondary_startup().

This write must be done in .smp_boot_secondary callback and not
in .smp_prepare_cpus as previously, this insures that secondary_data
struct is populated in __cpu_up() (stack, pgdir and swapper_pg_dir fields).

The IPI in sti_boot_secondary() is useless, so remove it.

This patch is the merged of Russell's patch [1] and the rework of
.smp_prepare_cpus and .smp_boot_secondary STi callbacks [2].

[1] https://patchwork.kernel.org/patch/10729435/
[2] https://patchwork.kernel.org/patch/10735795/

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol</title>
<updated>2017-02-28T11:06:10Z</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2017-01-15T02:59:29Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=64fc2a947a9873700929ec0ef02b4654a04e0476'/>
<id>urn:sha1:64fc2a947a9873700929ec0ef02b4654a04e0476</id>
<content type='text'>
All low-level PM/SMP code using virt_to_phys() should actually use
__pa_symbol() against kernel symbols. Update code where relevant to move
away from virt_to_phys().

Acked-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Reviewed-by: Laura Abbott &lt;labbott@redhat.com&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>reset: sti: Remove STiH415/6 reset support</title>
<updated>2016-10-20T09:52:08Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2016-09-14T13:27:53Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=64933513e4610c90d84104a4988a328c934a3e7b'/>
<id>urn:sha1:64933513e4610c90d84104a4988a328c934a3e7b</id>
<content type='text'>
Support for STiH415/6 SoCs is being removed from the
kernel because the platforms are obsolete. This patch removes
the reset drivers for these SoC's.

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/soc</title>
<updated>2016-07-14T13:08:15Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2016-07-14T13:08:15Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a98405432e864e8483e1bdbf50a5668d6604283f'/>
<id>urn:sha1:a98405432e864e8483e1bdbf50a5668d6604283f</id>
<content type='text'>
Merge "STi SoC changes for v4.8" from Patrice Chotard:

- Add a dummy L2 cache's write_sec callback as in non secure mode execution,
   we can't get access to L2 cache secure registers
- Cosmetics change, in case of dump_stack, update the hardware name with a
   more generic for the STi SoCs family

* tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: sti: Implement dummy L2 cache's write_sec
  ARM: STi: Update machine _namestr to be more generic.
</content>
</entry>
<entry>
<title>ARM: sti: Implement dummy L2 cache's write_sec</title>
<updated>2016-07-11T07:15:44Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2016-06-28T09:21:52Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7b8e0188fa717cd9abc4fb52587445b421835c2a'/>
<id>urn:sha1:7b8e0188fa717cd9abc4fb52587445b421835c2a</id>
<content type='text'>
This patch implements the write_sec callback that handle PL310
secure registers writes.
This callback is just a stub for now, to avoid system crash.
Later, it could handle SMC calls so that TZ handles the needed writes.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: STi: Update machine _namestr to be more generic.</title>
<updated>2016-07-11T07:15:29Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2016-05-11T16:40:00Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=50fdda702fe5c833a69aa36bbfe878319bbf443d'/>
<id>urn:sha1:50fdda702fe5c833a69aa36bbfe878319bbf443d</id>
<content type='text'>
This string is used by dump_stack and as we now support
more SoC's than just STiH415/6 it is misleading to have
the current string in the stack trace.

This patch updates it to be more generic for the STi
family of SoCs.

So instead of looking like this

[  271.672555] Hardware name: STiH415/416 SoC with Flattened Device Tree
[  271.678998] [&lt;c0310490&gt;] (unwind_backtrace) from [&lt;c030bb54&gt;] (show_stack+0x10/0x14)
[  271.686746] [&lt;c030bb54&gt;] (show_stack) from [&lt;c058bc4c&gt;] (dump_stack+0x98/0xac)
[snip]

it now looks like this:

[    2.669879] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.6.0-rc3-00026-g38a1ce6-dirty #76
[    2.677973] Hardware name: STi SoC with Flattened Device Tree
[    2.683723] [&lt;c0310490&gt;] (unwind_backtrace) from [&lt;c030bb54&gt;] (show_stack+0x10/0x14)
[    2.691472] [&lt;c030bb54&gt;] (show_stack) from [&lt;c058bc0c&gt;] (dump_stack+0x98/0xac)
[snip]

Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB</title>
<updated>2016-06-03T19:18:13Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2016-06-02T12:10:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5c34a4e89c743339f78cafb2f2a826a010f0746a'/>
<id>urn:sha1:5c34a4e89c743339f78cafb2f2a826a010f0746a</id>
<content type='text'>
This replaces:

- "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can
  now be selected directly.

- "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB
  is now selectable by everyone, so we need not declare our
  intent to select it.

When ordering the symbols the following rationale was used:
if the selects were in alphabetical order, I moved select GPIOLIB
to be in alphabetical order, but if the selects were not
maintained in alphabetical order, I just replaced
"select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB".

Cc: Michael Büsch &lt;m@bues.ch&gt;
Cc: arm@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
</feed>
