kernel/arch/arm/mach-imx/cpu.c, branch linux-6.2.y

soc: imx: move cpu code to drivers/soc/imx

2020-05-20T15:03:50Z

Move the soc device register code to drivers/soc/imx to align with i.MX8. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

ARM: imx: use device_initcall for imx_soc_device_init

2020-05-20T15:03:42Z

This is preparation to move imx_soc_device_init to drivers/soc/imx/ There is no reason to must put dt devices under /sys/devices/soc0, they could also be under /sys/devices/platform, so we could pass NULL as parent when calling of_platform_default_populate. Following soc-imx8.c soc-imx-scu.c using device_initcall, need to change return type to int type for imx_soc_device_init. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

ARM: vf610: report soc info via soc device

2020-04-23T14:54:53Z

The patch adds plumbing to soc device info code necessary to support Vybrid devices. Use case in mind for this is CAAM driver, which utilizes said API. Signed-off-by: Andrey Smirnov Cc: Lucas Stach Cc: Chris Healy Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-imx@nxp.com Tested-by: Chris Healy Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo

ARM: imx: Add i.MX7ULP SoC serial number support

2019-12-12T12:38:01Z

i.MX7ULP's unique ID layout in OCOTP is different from other i.MX6/7 SoCs as below: OCOTP layout unique ID 0x4b0 bit[15:0] bit[15:0] 0x4c0 bit[15:0] bit[31:16] 0x4d0 bit[15:0] bit[47:32] 0x4e0 bit[15:0] bit[63:48] Add support for reading serial number from OCOTP on i.MX7ULP. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo

ARM: imx: Fix boot crash if ocotp is not found

2019-12-12T02:44:28Z

The imx_soc_device_init functions tries to fetch the ocotp regmap in order to soc serial number. If regmap fetch fails then a message is printed but regmap_read is called anyway and the system crashes. Failing to lookup ocotp regmap shouldn't be a fatal boot error so check that the pointer is valid. Only side-effect of ocotp lookup failure now is that serial number will be reported as all-zeros which is acceptable. Cc: stable@vger.kernel.org Fixes: 8267ff89b713 ("ARM: imx: Add serial number support for i.MX6/7 SoCs") Signed-off-by: Leonard Crestez Tested-by: Christoph Niedermaier Signed-off-by: Shawn Guo

ARM: imx: Correct ocotp id for serial number support of i.MX6ULL/ULZ SoCs

2019-12-11T06:59:24Z

After the commit 8267ff89b713 ("ARM: imx: Add serial number support for i.MX6/7 SoCs") the kernel doesn't start on i.MX6ULL/ULZ SoC. Tested on next-20191205. For i.MX6ULL/ULZ the variable "ocotp_compat" is set to "fsl,imx6ul-ocotp", but with commit ffbc34bf0e9c ("nvmem: imx-ocotp: Implement i.MX6ULL/ULZ support") and commit f243bc821ee3 ("ARM: dts: imx6ull: Fix i.MX6ULL/ULZ ocotp compatible") the value "fsl,imx6ull-ocotp" is already defined and set in device tree... By setting "ocotp_compat" to "fsl,imx6ull-ocotp" the kernel does boot. Fixes: 8267ff89b713 ("ARM: imx: Add serial number support for i.MX6/7 SoCs") Signed-off-by: Christoph Niedermaier Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo

ARM: imx: Add serial number support for i.MX6/7 SoCs

2019-10-28T13:28:55Z

i.MX6/7 SoCs have a 64-bit SoC unique ID stored in OCOTP, it can be used as SoC serial number, add this support for i.MX6Q/6DL/6SL/6SX/6SLL/6UL/6ULL/6ULZ/7D, see below example on i.MX6Q: root@imx6qpdlsolox:~# cat /sys/devices/soc0/serial_number 240F31D4E1FDFCA7 Signed-off-by: Anson Huang Signed-off-by: Shawn Guo

ARM: imx: add initial support for imx7ulp

2018-12-10T00:56:30Z

The i.MX 7ULP family of processors features NXP's advanced implementation of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and 2D Graphics Processing Units (GPUs). This patch aims to add an initial support for imx7ulp. Note that we need configure power mode to Partial Stop mode 3 with system/bus clock enabled first as the default enabled STOP mode will gate off system/bus clock when execute WFI in MX7ULP SoC. And there's still no MXC_CPU_IMX7ULP IDs read from register as ULP has no anatop as before. So we encode one with 0xff in reverse order in case new ones will be in the future. Cc: Shawn Guo Signed-off-by: Dong Aisheng Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo

ARM: imx: add i.mx6ulz msl support

2018-09-30T07:31:40Z

The i.MX 6ULZ processor is a high-performance, ultra cost-efficient consumer Linux processor featuring an advanced implementation of a single Arm® Cortex®-A7 core, which operates at speeds up to 900 MHz. This patch adds basic MSL support for i.MX6ULZ, the i.MX6ULZ has same soc_id as i.MX6ULL, and SRC_SBMR2 bit[6] is to differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means i.MX6ULZ and 1'b0 means i.MX6ULL. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo

ARM: imx: flag failure of of_iomap

2018-07-11T12:47:37Z

imx_set_aips is assuming that the address returned from of_iomap is valid which it probably is in the normal case - as the call site is void error propagation is not possible but never the less at least a WARN_ON() seems warranted here. Signed-off-by: Nicholas Mc Guire Fixes: commit e57e4ab5fc2e ("ARM: i.MX: allow disabling supervisor protect via DT") Signed-off-by: Shawn Guo