<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/arm/mach-at91, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
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<updated>2022-12-13T23:22:14Z</updated>
<entry>
<title>Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm</title>
<updated>2022-12-13T23:22:14Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-12-13T23:22:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4cb1fc6fffe4910845e183d1a2dfe9509ba1062c'/>
<id>urn:sha1:4cb1fc6fffe4910845e183d1a2dfe9509ba1062c</id>
<content type='text'>
Pull ARM updates from Russell King:

 - update unwinder to cope with module PLTs

 - enable UBSAN on ARM

 - improve kernel fault message

 - update UEFI runtime page tables dump

 - avoid clang's __aeabi_uldivmod generated in NWFPE code

 - disable FIQs on CPU shutdown paths

 - update XOR register usage

 - a number of build updates (using .arch, thread pointer, removal of
   lazy evaluation in Makefile)

 - conversion of stacktrace code to stackwalk

 - findbit assembly updates

 - hwcap feature updates for ARMv8 CPUs

 - instruction dump updates for big-endian platforms

 - support for function error injection

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (31 commits)
  ARM: 9279/1: support function error injection
  ARM: 9277/1: Make the dumped instructions are consistent with the disassembled ones
  ARM: 9276/1: Refactor dump_instr()
  ARM: 9275/1: Drop '-mthumb' from AFLAGS_ISA
  ARM: 9274/1: Add hwcap for Speculative Store Bypassing Safe
  ARM: 9273/1: Add hwcap for Speculation Barrier(SB)
  ARM: 9272/1: vfp: Add hwcap for FEAT_AA32I8MM
  ARM: 9271/1: vfp: Add hwcap for FEAT_AA32BF16
  ARM: 9270/1: vfp: Add hwcap for FEAT_FHM
  ARM: 9269/1: vfp: Add hwcap for FEAT_DotProd
  ARM: 9268/1: vfp: Add hwcap FPHP and ASIMDHP for FEAT_FP16
  ARM: 9267/1: Define Armv8 registers in AArch32 state
  ARM: findbit: add unwinder information
  ARM: findbit: operate by words
  ARM: findbit: convert to macros
  ARM: findbit: provide more efficient ARMv7 implementation
  ARM: findbit: document ARMv5 bit offset calculation
  ARM: 9259/1: stacktrace: Convert stacktrace to generic ARCH_STACKWALK
  ARM: 9258/1: stacktrace: Make stack walk callback consistent with generic code
  ARM: 9265/1: pass -march= only to compiler
  ...
</content>
</entry>
<entry>
<title>ARM: at91: fix build for SAMA5D3 w/o L2 cache</title>
<updated>2022-11-24T10:50:07Z</updated>
<author>
<name>Peter Rosin</name>
<email>peda@axentia.se</email>
</author>
<published>2022-11-12T15:40:59Z</published>
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<id>urn:sha1:6a3fc8c330d1c1fa3d8773d7d38a7c55c4900dfe</id>
<content type='text'>
The L2 cache is present on the newer SAMA5D2 and SAMA5D4 families, but
apparently not for the older SAMA5D3.

Solves a build-time regression with the following symptom:

sama5.c:(.init.text+0x48): undefined reference to `outer_cache'

Fixes: 3b5a7ca7d252 ("ARM: at91: setup outer cache .write_sec() callback if needed")
Signed-off-by: Peter Rosin &lt;peda@axentia.se&gt;
[claudiu.beznea: delete "At least not always." from commit description]
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Link: https://lore.kernel.org/r/b7f8dacc-5e1f-0eb2-188e-3ad9a9f7613d@axentia.se
</content>
</entry>
<entry>
<title>ARM: 9263/1: use .arch directives instead of assembler command line flags</title>
<updated>2022-11-08T18:36:17Z</updated>
<author>
<name>Nick Desaulniers</name>
<email>ndesaulniers@google.com</email>
</author>
<published>2022-10-24T19:44:41Z</published>
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<id>urn:sha1:a2faac39866d0313f3ca59c36a9f4e077faf4f53</id>
<content type='text'>
Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
directives instead of assembler arguments").

GCC and GNU binutils support setting the "sub arch" via -march=,
-Wa,-march, target function attribute, and .arch assembler directive.

Clang was missing support for -Wa,-march=, but this was implemented in
clang-13.

The behavior of both GCC and Clang is to
prefer -Wa,-march= over -march= for assembler and assembler-with-cpp
sources, but Clang will warn about the -march= being unused.

clang: warning: argument unused during compilation: '-march=armv6k'
[-Wunused-command-line-argument]

Since most assembler is non-conditionally assembled with one sub arch
(modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
.arch assembler directive.

Add a few more instances found in compile testing as found by Arnd and
Nathan.

Link: https://github.com/llvm/llvm-project/commit/1d51c699b9e2ebc5bcfdbe85c74cc871426333d4
Link: https://bugs.llvm.org/show_bug.cgi?id=48894
Link: https://github.com/ClangBuiltLinux/linux/issues/1195
Link: https://github.com/ClangBuiltLinux/linux/issues/1315

Suggested-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Suggested-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Tested-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Signed-off-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Signed-off-by: Russell King (Oracle) &lt;rmk+kernel@armlinux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: at91: pm: avoid soft resetting AC DLL</title>
<updated>2022-11-01T10:25:19Z</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2022-10-26T12:41:04Z</published>
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<id>urn:sha1:cef8cdc0d0e7c701fe4dcfba4ed3fd25d28a6020</id>
<content type='text'>
Do not soft reset AC DLL as controller is buggy and this operation my
introduce glitches in the controller leading to undefined behavior.

Fixes: f0bbf17958e8 ("ARM: at91: pm: add self-refresh support for sama7g5")
Depends-on: a02875c4cbd6 ("ARM: at91: pm: fix self-refresh for sama7g5")
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Link: https://lore.kernel.org/r/20221026124114.985876-2-claudiu.beznea@microchip.com
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2022-10-11T17:59:59Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-11T17:59:59Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=979bb59016aed7c7c58baca2307d9d13890cc6ab'/>
<id>urn:sha1:979bb59016aed7c7c58baca2307d9d13890cc6ab</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "There is nothing exciting going on, no core changes, just a few
  drivers and cleanups.

  New drivers:

   - Cypress CY8C95x0 chip pin control support, along with an immediate
     cleanup

   - Mediatek MT8188 SoC pin control support

   - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin
     control support

   - Qualcomm PM7250, PM8450

   - Rockchip RV1126 SoC pin control support

  Improvements:

   - Fix some missing pins in the Armada 37xx driver

   - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP()
     macro

   - Fix some GPIO irq_chips to be immutable

   - Massive Qualcomm device tree binding cleanup, with more to come"

* tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits)
  MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement
  pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
  pinctrl: Create subdirectory for StarFive drivers
  dt-bindings: pinctrl: st,stm32: Document interrupt-controller property
  dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property
  dt-bindings: pinctrl: st,stm32: Document gpio-line-names
  pinctrl: st: stop abusing of_get_named_gpio()
  pinctrl: wpcm450: Correct the fwnode_irq_get() return value check
  pinctrl: bcm: Remove unused struct bcm6328_pingroup
  pinctrl: qcom: restrict drivers per ARM/ARM64
  pinctrl: bcm: ns: Remove redundant dev_err call
  gpio: rockchip: request GPIO mux to pinctrl when setting direction
  pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback
  pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops
  pinctrl: cy8c95x0: Drop atomicity on operations on push_pull
  pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux()
  pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper
  pinctrl: stm32: Switch to use dev_err_probe() helper
  dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings
  pinctrl: qcom: spmi-gpio: Add compatible for PM7250B
  ...
</content>
</entry>
<entry>
<title>Merge tag 'arm-soc-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2022-10-06T18:22:25Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-06T18:22:25Z</published>
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<id>urn:sha1:41fc64a0550b86f4428e8d3fa23ab97678a65ae8</id>
<content type='text'>
Pull ARM SoC updates from Arnd Bergmann:
 "The main changes this time are for the organization of the Kconfig
  files, introducing per-vendor top-level options on arm64 to match
  those on arm32, and making the platform selection on arm32 more
  uniform, in particular for the remaining StrongARM platforms that
  still have a couple of special cases compared to the more recent ones.

  I also did a cleanup of the old Footbridge platform, which was the
  last holdout for the phys_to_dma()/dma_to_phys() interface that is now
  completely gone from arm32, completing work started by Christoph
  Hellwig"

* tag 'arm-soc-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits)
  ARM: aspeed: Kconfig: Fix indentation
  ARM: Drop CMDLINE_* dependency on ATAGS
  ARM: Drop CMDLINE_FORCE dependency on !ARCH_MULTIPLATFORM
  ARM: s3c: remove orphan declarations from arch/arm/mach-s3c/devs.h
  pxa: Drop if with an always false condition
  ARM: orion: fix include path
  ARM: shmobile: Drop selecting SOC_BUS
  arm64: renesas: Drop selecting SOC_BUS
  ARM: disallow PCI with MMU=n again
  ARM: footbridge: remove custom DMA address handling
  MAINTAINERS: Add BCM4908 maintainer to BCMBCA entry
  ARM: footbridge: move isa-dma support into footbridge
  ARM: footbridge: remove leftover from personal-server
  ARM: footbridge: remove addin mode
  arm64: Kconfig.platforms: Group NXP platforms together
  arm64: Kconfig.platforms: Re-organized Broadcom menu
  ARM: make ARCH_MULTIPLATFORM user-visible
  ARM: fix XIP_KERNEL dependencies
  ARM: Kconfig: clean up platform selection
  ARM: simplify machdirs/platdirs handling
  ...
</content>
</entry>
<entry>
<title>pinctrl: at91: move gpio suspend/resume calls to driver's context</title>
<updated>2022-09-02T22:19:23Z</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2022-08-31T13:56:35Z</published>
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<id>urn:sha1:a575207583676298f3999d41d86d81f7172fe950</id>
<content type='text'>
Move gpio suspend/resume execution local to driver and let it execute as
close as possible to the moment the machine specific PM code is executed
(by setting it to .noirq member of dev_pm_ops). With this the
at91_pinctrl_gpio_suspend()/at91_pinctrl_gpio_resume() calls were removed
from arch/arm/mach-at91/pm.c and also a header has been removed.
The patch has been checked on sama5d3_xplained, sam9x60ek,
sama5d2_xplained, sama7g5ek boards.

Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Link: https://lore.kernel.org/r/20220831135636.3176406-3-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh</title>
<updated>2022-08-31T07:28:18Z</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2022-08-26T08:39:21Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7a94b83a7dc551607b6c4400df29151e6a951f07'/>
<id>urn:sha1:7a94b83a7dc551607b6c4400df29151e6a951f07</id>
<content type='text'>
On SAMA7G5, when resuming from backup and self-refresh, the bootloader
performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored
in RAM by Linux before going to backup and self-refresh). It has been
discovered that the current procedure doesn't work for all possible values
that might go to ZQ0SR0 due to hardware bug. The workaround to this is to
avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0
register and cache its value in RAM after processing it (using
modified_gray_code array). The bootloader will restore the processed value.

Fixes: d2d4716d8384 ("ARM: at91: pm: save ddr phy calibration data to securam")
Suggested-by: Frederic Schumacher &lt;frederic.schumacher@microchip.com&gt;
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com
</content>
</entry>
<entry>
<title>ARM: at91: pm: fix self-refresh for sama7g5</title>
<updated>2022-08-31T07:27:57Z</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2022-08-26T08:39:20Z</published>
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<id>urn:sha1:a02875c4cbd6f3d2f33d70cc158a19ef02d4b84f</id>
<content type='text'>
It has been discovered that on some parts, from time to time, self-refresh
procedure doesn't work as expected. Debugging and investigating it proved
that disabling AC DLL introduce glitches in RAM controllers which
leads to unexpected behavior. This is confirmed as a hardware bug. DLL
bypass disables 3 DLLs: 2 DX DLLs and AC DLL. Thus, keep only DX DLLs
disabled. This introduce 6mA extra current consumption on VDDCORE when
switching to any ULP mode or standby mode but the self-refresh procedure
still works.

Fixes: f0bbf17958e8 ("ARM: at91: pm: add self-refresh support for sama7g5")
Suggested-by: Frederic Schumacher &lt;frederic.schumacher@microchip.com&gt;
Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Tested-by: Cristian Birsan &lt;cristian.birsan@microchip.com&gt;
Link: https://lore.kernel.org/r/20220826083927.3107272-3-claudiu.beznea@microchip.com
</content>
</entry>
<entry>
<title>ARM: remove obsolete Makefile.boot infrastructure</title>
<updated>2022-08-18T14:44:59Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2022-07-27T07:26:45Z</published>
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<id>urn:sha1:92481c7d14b8030418f00c4b4ec65556565d892d</id>
<content type='text'>
There are a number of old Makefile.boot files that remain from the
multiplatform conversion, and three that are still in use.

These provide the "ZRELADDR", "PARAMS_PHYS" and "INITRD_PHYS" values
that are platform specific. It turns out that we can generally just
derive this from information that is available elsewhere:

- ZRELADDR is normally detected at runtime with the
  CONFIG_AUTO_ZRELADDR flag, but also needed to be passed to
  for 'make uImage'. In a multiplatform kernel, one always has
  to pass this as the $(LOADADDR) variable, but in the StrongARM
  kernels we can derive it from the sum of $(CONFIG_PHYS_OFFSET)
  and $(TEXT_OFFSET) that are already known.

- PARAMS_PHYS and INITRD_PHYS are only used for bootpImage, which
  in turn is only used for the pre-ATAGS 'param_struct' based boot
  interface on StrongARM based machines with old boot loaders.
  They can both be derived from CONFIG_PHYS_OFFSET and a machine
  specific offset for the initrd, so all of the logic for these
  can be part of arch/arm/boot/bootp/Makefile.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
