kernel/arch/arm/include/asm/mcpm.h, branch linux-5.14.y

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19T15:09:55Z

Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Enrico Weigelt Reviewed-by: Kate Stewart Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman

ARM: MCPM: remove residency argument from mcpm_cpu_suspend()

2015-05-06T15:47:10Z

This is currently unused. If a suspend must be limited to CPU level only by preventing the last man from triggering a cluster level suspend then this should be determined according to many other criteria the MCPM layer is currently not aware of. It is unlikely that mcpm_cpu_suspend() would be the proper conduit for that information anyway. Signed-off-by: Nicolas Pitre Acked-by: Dave Martin

ARM: MCPM: make internal helpers private to the core code

2015-05-06T15:45:46Z

This concerns the following helpers: __mcpm_cpu_going_down() __mcpm_cpu_down() __mcpm_outbound_enter_critical() __mcpm_outbound_leave_critical() __mcpm_cluster_state() They are and should only be used by the core code now. Therefore their declarations are removed from mcpm.h and their definitions are made static, hence the need to move them before their users which accounts for the bulk of this patch. This left the mcpm_sync_struct definition at an odd location, therefore it is moved as well with some comment clarifications. Signed-off-by: Nicolas Pitre Acked-by: Dave Martin

ARM: MCPM: remove backward compatibility code

2015-05-06T15:43:12Z

Now that no one uses the old callbacks anymore, let's remove them and associated support code. Signed-off-by: Nicolas Pitre Acked-by: Dave Martin

ARM: MCPM: move the algorithmic complexity to the core code

2015-04-03T19:52:46Z

All backends are reimplementing a variation of the same CPU reference count handling. They are also responsible for driving the MCPM special low-level locking. This is needless duplication, involving algorithmic requirements that are not necessarily obvious to the uninitiated. And from past code review experience, those were all initially implemented badly. After 3 years, it is time to refactor as much common code to the core MCPM facility to make the backends as simple as possible. To avoid a flag day, the new scheme is introduced in parallel to the existing backend interface. When all backends are converted over, the compatibility interface could be removed. The new MCPM backend interface implements simpler methods addressing very platform specific tasks performed under lock protection while keeping the algorithmic complexity and race avoidance local to the core code. Signed-off-by: Nicolas Pitre Tested-by: Daniel Lezcano Signed-off-by: Olof Johansson

ARM: 8240/1: MCPM: document mcpm_sync_init()

2014-12-03T16:00:06Z

Signed-off-by: Nicolas Pitre Signed-off-by: Russell King

ARM: mcpm: support 4 clusters

2014-09-03T13:09:58Z

Add the CONFIG_MCPM_QUAD_CLUSTER configuration to enlarge cluster number from 2 to 4. Signed-off-by: Haojian Zhuang Reviewed-by: Nicolas Pitre Signed-off-by: Wei Xu

ARM: 8081/1: MCPM: provide infrastructure to allow for MCPM loopback

2014-07-18T10:58:00Z

The kernel already has the responsibility to handle resources such as the CCI when hotplugging CPUs, during the booting of secondary CPUs, and when resuming from suspend/idle. It would be more coherent and less confusing if the CCI for the boot CPU (or cluster) was also initialized by the kernel rather than expecting the firmware/bootloader to do it and only in that case. After all, the kernel has all the necessary code already and the bootloader shouldn't have to care at all. The CCI may be turned on only when the cache is off. Leveraging the CPU suspend code to loop back through the low-level MCPM entry point is all that is needed to properly turn on the CCI from the kernel by using the same code as during secondary boot. Let's provide a generic MCPM loopback function that can be invoked by backend initialization code to set things (CCI or similar) on the boot CPU just as it is done for the other CPUs. Signed-off-by: Nicolas Pitre Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Tested-by: Doug Anderson Signed-off-by: Russell King

ARM: 8080/1: mcpm.h: remove unused variable declaration

2014-06-29T09:29:32Z

The sync_phys variable has been replaced by link time computation in mcpm_head.S before the code was submitted upstream. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King

Merge branches 'alignment', 'fixes', 'l2c' (early part) and 'misc' into for-next

2014-06-05T11:35:52Z