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<title>kernel/arch/arm/include/asm/krait-l2-accessors.h, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
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<updated>2018-10-17T20:14:33Z</updated>
<entry>
<title>ARM: Add Krait L2 register accessor functions</title>
<updated>2018-10-17T20:14:33Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-08-14T12:12:20Z</published>
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<id>urn:sha1:36d68f64c411e09788687d5919886aadeb92adca</id>
<content type='text'>
Krait CPUs have a handful of L2 cache controller registers that
live behind a cp15 based indirection register. First you program
the indirection register (l2cpselr) to point the L2 'window'
register (l2cpdr) at what you want to read/write.  Then you
read/write the 'window' register to do what you want. The
l2cpselr register is not banked per-cpu so we must lock around
accesses to it to prevent other CPUs from re-pointing l2cpdr
underneath us.

Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Acked-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
Tested-by: Craig Tatlor &lt;ctatlor97@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
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