kernel/arch/arm/boot/dts/vt8500, branch 0x221E-v0.0.1-v6.19

ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950

2025-06-12T15:25:18Z

WonderMedia WM8850/WM8950 uses an ARM PL310 cache controller for its L2 cache, add it. The parameters have been deduced from vendor's U-boot environment variables, which the downstream code uses to initialize the controller. They set the following register values: aux = 0x3e440000 prefetch_ctrl = 0x70000007 Their initialization code also unconditionally sets the flags L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, so encode those too Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-5-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller

2025-06-12T15:25:17Z

Set correct unit address of d800e400 for the via,vt8500-fb node in vt8500.dtsi. Note that the reg property contained a correct address, so it must have been a copy and paste error earlier. While here, also update its node name to a generic one. Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-4-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: vt8500: Use generic node name for the SD/MMC controller

2025-06-12T15:25:17Z

Current guidelines recommend mmc@ node names, so use that instead. Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-3-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size

2025-06-12T15:25:15Z

VIA/WonderMedia SoCs don't have on-chip memory, so their memory nodes are better placed in per-board dts rather than per-SoC dtsi. Move them accordingly, and also add correct node addresses and sizes for each of the boards. Some boards were also available with more memory than included in this commit - those would need a separate DT or an appropriate kernel cmdline argument to reflect it, as the bootloader on these devices doesn't handle DT at all nor does it any runtime discovery of available memory size. Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-2-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: vt8500: Add node address and reg in CPU nodes

2025-06-12T15:25:14Z

Adjust CPU nodes according to current guidelines, including address and reg. Set #address-cells accordingly. Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-1-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski

Merge tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

2025-05-21T21:46:02Z

VT8500 DTS ARM changes for v6.16 1. New board: VIA APC Rock/Paper. 2. Add SCC ID register/socinfo node. 3. List all timer interrupts. * tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: ARM: dts: vt8500: list all four timer interrupts ARM: dts: vt8500: add DT nodes for the system config ID register ARM: dts: vt8500: Add VIA APC Rock/Paper board dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boards Link: https://lore.kernel.org/r/20250513104216.25803-5-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann

ARM: dts: vt8500: list all four timer interrupts

2025-05-12T06:35:24Z

VIA/WonderMedia SoC timer can generate up to four interrupts corresponding to four timer match registers (firing when the 32-bit freerunning clock source counter matches either of the match registers, respectively). List all four interrupts in device trees. This also enables the system event timer to use a match register other than 0, which can then in turn be used as a system watchdog (watchdog function is not available on other channels) Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250507-vt8500-timer-updates-v2-4-65e5d1b0855e@gmail.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: vt8500: add DT nodes for the system config ID register

2025-05-12T06:35:23Z

Every VIA/WonderMedia SoC has a 32-bit chip ID register at the MMIO address 0xd8120000. Add respective device tree nodes to let the system code access it at runtime for the selection of appropriate hardware quirks where needed. Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-3-2daa9056fa10@gmail.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: vt8500: Add VIA APC Rock/Paper board

2025-05-12T06:35:22Z

APC Rock is a development board based on WonderMedia WM8590 released around 2013. Paper is the same board, but with the VGA port left unpopulated, and shipped with a recycled cardboard case Its hardware includes: * Single-core Cortex-A9 CPU at 800 MHz * 512MB DDR3 RAM * 4GB NAND flash * 8MB SPI NOR flash * ARM Mali-400 GPU * HDMI output (type A) capable of 1080p * VGA output (on Rock, but not on Paper) * 2x USB 2.0 type A * 1x USB 2.0 OTG (microUSB connector) * microSD slot * 10/100M Ethernet * 3.5mm minijack connector with combined headphones/mic * Half-height miniPCIe slot (with only USB 2.0 signals) Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250425-apc_paper_binding-v5-2-3aef49e97332@gmail.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: vt8500: use correct ohci/ehci node names

2025-05-09T20:31:19Z

They should be named "usb@". Reviewed-by: Krzysztof Kozlowski Signed-off-by: Wolfram Sang Link: https://lore.kernel.org/r/20250330193833.21970-12-wsa+renesas@sang-engineering.com Signed-off-by: Arnd Bergmann