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<title>kernel/arch/arc/include/asm/entry-compact.h, branch linux-4.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.2.y'/>
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<updated>2015-06-19T12:39:40Z</updated>
<entry>
<title>ARC: intc: split into ARCompact ISA specific, common bits</title>
<updated>2015-06-19T12:39:40Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-03-05T13:43:56Z</published>
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<id>urn:sha1:5793e273a134331d05ed904e5be3b31ccfca54c1</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: entry.S: [arcompact] simplify SWITCH_TO_KERNEL_STK</title>
<updated>2015-06-19T12:39:40Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-03-28T16:06:00Z</published>
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<id>urn:sha1:5a343b9fe22995c43b1209b0b63ea0fa2824cbae</id>
<content type='text'>
Previously this macro was overloaded with stack switching, saving SP at right
slot in pt_regs, saving/setup of r25 and setting SP baseline to where
pt_regs-&gt;sp is saved (vs. bottom of pt_regs)

Now it only does SP switch, and leaves SP pointing to bottom of pt_regs.

r25 saving is no longer done here to allow for future reordering of
regfile in pt_regs w/o touching this macro

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: entry.S: micro-optimize Trap handler</title>
<updated>2015-06-19T12:39:39Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-03-13T06:20:23Z</published>
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<id>urn:sha1:62fb64034d30293448de10a48c7ee47ee978e338</id>
<content type='text'>
Elide the need to re-read ECR in Trap handler by ensuring that
EXCEPTION_PROLOGUE does that at the very end just before returning
to Trap handler

ARCv2 EXCEPTION_PROLOGUE already did that, so same for ARcompact and the
common trap handler adjusted to use cached ECR

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: entry.S: split into ARCompact ISA specific, common bits</title>
<updated>2015-06-19T12:39:38Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-02-21T09:39:32Z</published>
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<id>urn:sha1:6d1a20b1d237db29878ae54142e39c87a36d0e95</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
</feed>
