<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/arch/arc/include/asm/atomic.h, branch linux-4.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.15.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.15.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2017-08-10T10:28:54Z</updated>
<entry>
<title>locking/atomic: Fix atomic_set_release() for 'funny' architectures</title>
<updated>2017-08-10T10:28:54Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2017-06-09T11:05:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9d664c0aec3bfdb77fcf7de61cfe1febbecdd389'/>
<id>urn:sha1:9d664c0aec3bfdb77fcf7de61cfe1febbecdd389</id>
<content type='text'>
Those architectures that have a special atomic_set implementation also
need a special atomic_set_release(), because for the very same reason
WRITE_ONCE() is broken for them, smp_store_release() is too.

The vast majority is architectures that have spinlock hash based atomic
implementation except hexagon which seems to have a hardware 'feature'.

The spinlock based atomics should be SC, that is, none of them appear to
place extra barriers in atomic_cmpxchg() or any of the other SC atomic
primitives and therefore seem to rely on their spinlock implementation
being SC (I did not fully validate all that).

Therefore, the normal atomic_set() is SC and can be used at
atomic_set_release().

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Acked-by: Chris Metcalf &lt;cmetcalf@mellanox.com&gt; [for tile]
Cc: Boqun Feng &lt;boqun.feng@gmail.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Paul McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: davem@davemloft.net
Cc: james.hogan@imgtec.com
Cc: jejb@parisc-linux.org
Cc: rkuo@codeaurora.org
Cc: vgupta@synopsys.com
Link: http://lkml.kernel.org/r/20170609110506.yod47flaav3wgoj5@hirez.programming.kicks-ass.net
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARC: [plat-eznps] Fix build error</title>
<updated>2017-04-14T16:56:06Z</updated>
<author>
<name>Noam Camus</name>
<email>noamca@mellanox.com</email>
</author>
<published>2017-04-04T08:00:41Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6492f09e864417d382e22b922ae30693a7ce2982'/>
<id>urn:sha1:6492f09e864417d382e22b922ae30693a7ce2982</id>
<content type='text'>
Make ATOMIC_INIT available for all ARC platforms (including plat-eznps)

Cc: &lt;stable@vger.kernel.org&gt;	# 4.9+
Signed-off-by: Noam Camus &lt;noamca@mellanox.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [plat-eznps] add missing atomic_fetch_xxx operations</title>
<updated>2016-09-30T21:48:18Z</updated>
<author>
<name>Noam Camus</name>
<email>noamca@mellanox.com</email>
</author>
<published>2016-09-19T05:34:40Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ce0f493240ad356bb18b7f3637d1705fc8fc5712'/>
<id>urn:sha1:ce0f493240ad356bb18b7f3637d1705fc8fc5712</id>
<content type='text'>
Build brekeage since last changes to generic atomic operations.
Added couple of missing macros which are now mandatory

Signed-off-by: Noam Camus &lt;noamca@mellanox.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: Implement atomic64 based on LLOCKD/SCONDD instructions</title>
<updated>2016-09-30T21:48:17Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-07-27T11:53:28Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ce6365270ecd1216b48fb1440978e454ae0144de'/>
<id>urn:sha1:ce6365270ecd1216b48fb1440978e454ae0144de</id>
<content type='text'>
ARCv2 ISA provides 64-bit exclusive load/stores so use them to implement
the 64-bit atomics and elide the spinlock based generic 64-bit atomics

boot tested with atomic64 self-test (and GOD bless the person who wrote
them, I realized my inline assmebly is sloppy as hell)

Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: linux-snps-arc@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>locking/atomic, arch/arc: Fix build</title>
<updated>2016-06-20T09:25:49Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2016-06-17T15:02:01Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4aef66c8ae91d00affeeb24cfb176b53354ac969'/>
<id>urn:sha1:4aef66c8ae91d00affeeb24cfb176b53354ac969</id>
<content type='text'>
Resolve conflict between commits:

  fbffe892e525 ("locking/atomic, arch/arc: Implement atomic_fetch_{add,sub,and,andnot,or,xor}()")

and:

  ed6aefed726a ("Revert "ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponential backoff"")

Reported-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Nigel Topham &lt;ntopham@synopsys.com&gt;
Cc: Noam Camus &lt;noamc@ezchip.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>locking/atomic: Remove linux/atomic.h:atomic_fetch_or()</title>
<updated>2016-06-16T08:48:32Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2016-04-17T22:58:25Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=b53d6bedbe781974097fd8c38263f6cc78ff9ea7'/>
<id>urn:sha1:b53d6bedbe781974097fd8c38263f6cc78ff9ea7</id>
<content type='text'>
Since all architectures have this implemented now natively, remove this
dead code.

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>locking/atomic, arch/arc: Implement atomic_fetch_{add,sub,and,andnot,or,xor}()</title>
<updated>2016-06-16T08:48:20Z</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2016-04-17T23:16:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fbffe892e5253dd02c016c59a9d792eafe9d53e1'/>
<id>urn:sha1:fbffe892e5253dd02c016c59a9d792eafe9d53e1</id>
<content type='text'>
Implement FETCH-OP atomic primitives, these are very similar to the
existing OP-RETURN primitives we already have, except they return the
value of the atomic variable _before_ modification.

This is especially useful for irreversible operations -- such as
bitops (because it becomes impossible to reconstruct the state prior
to modification).

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Noam Camus &lt;noamc@ezchip.com&gt;
Cc: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>Revert "ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponential backoff"</title>
<updated>2016-06-02T05:29:23Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2016-05-31T11:05:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ed6aefed726a305bd36344e230d2a9e9301226fc'/>
<id>urn:sha1:ed6aefed726a305bd36344e230d2a9e9301226fc</id>
<content type='text'>
This reverts commit e78fdfef84be13a5c2b8276e12203cdf24778596.

The issue was fixed in hardware in HS2.1C release and there are no known
external users of affected RTL so revert the whole delayed retry series !

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>Revert "ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoff"</title>
<updated>2016-06-02T05:29:22Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2016-05-31T11:01:33Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=42316a201a60be38b07db1ebc3a1633107ed7209'/>
<id>urn:sha1:42316a201a60be38b07db1ebc3a1633107ed7209</id>
<content type='text'>
This reverts commit 10971638701dedadb58c88ce4d31c9375b224ed6.

The issue was fixed in hardware in HS2.1C release and there are no known
external users of affected RTL - so revert thw whole delayed retry
series !

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [plat-eznps] Use dedicated atomic/bitops/cmpxchg</title>
<updated>2016-05-09T04:02:33Z</updated>
<author>
<name>Noam Camus</name>
<email>noamc@ezchip.com</email>
</author>
<published>2015-05-16T14:49:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=a5a10d99a946602cf4ae50eadc65c2480dbd2e56'/>
<id>urn:sha1:a5a10d99a946602cf4ae50eadc65c2480dbd2e56</id>
<content type='text'>
We need our own implementaions since we lack LLSC support.
Our extended ISA provided with optimized solution for all 32bit
operations we see in these three headers.
Signed-off-by: Noam Camus &lt;noamc@ezchip.com&gt;
</content>
</entry>
</feed>
