kernel/Documentation/driver-api/dmaengine/provider.rst, branch linux-rolling-stable

Merge tag 'dmaengine-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2025-06-05T15:49:30Z

Pull dmaengine updates from Vinod Koul: "A fairly small update for the dmaengine subsystem. This has a new ARM dmaengine driver and couple of new device support and few driver changes: New support: - Renesas RZ/V2H(P) dma support for r9a09g057 - Arm DMA-350 driver - Tegra Tegra264 ADMA support Updates: - AMD ptdma driver code removal and optimizations - Freescale edma error interrupt handler support" * tag 'dmaengine-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (27 commits) dmaengine: idxd: Remove unused pointer and macro arm64: dts: renesas: r9a09g057: Add DMAC nodes dmaengine: sh: rz-dmac: Add RZ/V2H(P) support dmaengine: sh: rz-dmac: Allow for multiple DMACs irqchip/renesas-rzv2h: Add rzv2h_icu_register_dma_req() dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs dt-bindings: dma: rz-dmac: Restrict properties for RZ/A1H dmaengine: idxd: Narrow the restriction on BATCH to ver. 1 only dmaengine: ti: Add NULL check in udma_probe() fsldma: Set correct dma_mask based on hw capability dmaengine: idxd: Check availability of workqueue allocated by idxd wq driver before using dmaengine: xilinx_dma: Set dma_device directions dmaengine: tegra210-adma: Add Tegra264 support dt-bindings: Document Tegra264 ADMA support dmaengine: dw-edma: Add HDMA NATIVE map check dmaegnine: fsl-edma: add edma error interrupt handler dt-bindings: dma: fsl-edma: increase maxItems of interrupts and interrupt-names dmaengine: ARM_DMA350 should depend on ARM/ARM64 dt-bindings: dma: qcom,bam: Document dma-coherent property dmaengine: Add Arm DMA-350 driver ...

docs: dmaengine: add explanation for DMA_ASYNC_TX capability

2025-05-07T07:02:57Z

This patch replaces the TODO for DMA_ASYNC_TX in the DMA engine provider documentation. The flag is automatically set by the DMA framework when a device supports key asynchronous memory-to-memory operations such as memcpy, memset, xor, pq, xor_val, and pq_val. It must not be set by drivers directly. Signed-off-by: Kendra Moore Signed-off-by: Jonathan Corbet Message-ID: <20250421010205.84719-1-kendra.j.moore3443@gmail.com>

Documentation: dmaengine: Correct reference to glReadPixels()

2025-04-07T05:33:47Z

The author very likely meant "glReadPixels()" instead of "glReadpielx()", which does not appear in the OpenGL API. https://registry.khronos.org/OpenGL-Refpages/gl4/html/glReadPixels.xhtml Signed-off-by: Nathan Lynch Link: https://lore.kernel.org/r/20241010-doc-dmaengine-glreadpixels-v1-1-8202e5834b13@amd.com Signed-off-by: Vinod Koul

Documentation: dmaengine: Document new dma_vec API

2024-06-21T10:01:57Z

Document the dmaengine_prep_peripheral_dma_vec() API function, the device_prep_peripheral_dma_vec() backend function, and the dma_vec struct. Signed-off-by: Paul Cercueil Reviewed-by: Bagas Sanjaya Link: https://lore.kernel.org/r/20240620122726.41232-8-paul@crapouillou.net Signed-off-by: Vinod Koul

dmaengine: remove DMA_MEMCPY_SG once again

2022-06-27T06:31:40Z

This was removed before due to the complete lack of users, but 3218910fd585 ("dmaengine: Add core function and capability check for DMA_MEMCPY_SG") and 29cf37fa6dd9 ("dmaengine: Add consumer for the new DMA_MEMCPY_SG API function.") added it back despite still not having any users whatsoever. Fixes: 3218910fd585 ("dmaengine: Add core function and capability check for DMA_MEMCPY_SG") Fixes: 29cf37fa6dd9 ("dmaengine: Add consumer for the new DMA_MEMCPY_SG API function.") Signed-off-by: Christoph Hellwig Acked-by: Michal Simek Link: https://lore.kernel.org/r/20220606074733.622616-1-hch@lst.de Signed-off-by: Vinod Koul

dmaengine: Document dmaengine_prep_dma_memset

2022-04-20T11:58:12Z

Document this function to make clear the expected behavior of the 'value' parameter. It was intended to match the behavior of POSIX memset as laid out here: https://lore.kernel.org/dmaengine/YejrA5ZWZ3lTRO%2F1@matsya/ Signed-off-by: Ben Walker Link: https://lore.kernel.org/r/20220301182551.883474-2-benjamin.walker@intel.com Signed-off-by: Vinod Koul

dmaengine: Clarify cyclic transfer residue documentation

2022-04-11T13:45:52Z

The current documentation for the residue reported in a cyclic transfer case mentions that the reported residue should be relative to the current period only. However the definition of DMA_RESIDUE_GRANULARITY_SEGMENT specifies that the residue should be updated after each period for a cyclic transfer, which is in direct contradiction. Moreover the pcm_dmaengine common code uses the residue relative to the whole cyclic buffer size, not one period. Correct the residue-related documentation to reflect this. Signed-off-by: Paul Kocialkowski Link: https://lore.kernel.org/r/20220331134114.703782-1-paul.kocialkowski@bootlin.com Signed-off-by: Vinod Koul

dmaengine: Add documentation for new memcpy scatter-gather function

2021-11-22T06:08:04Z

Documentation describes semantics, limitations and a typical use case scenario. Signed-off-by: Adrian Larumbe Link: https://lore.kernel.org/r/20211101180825.241048-2-adrianml@alumnos.upm.es Signed-off-by: Vinod Koul

Merge tag 'dmaengine-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2020-08-07T19:41:36Z

Pull dmaengine updates from Vinod Koul: "Core: - Support out of order dma completion - Support for repeating transaction New controllers: - Support for Actions S700 DMA engine - Renesas R8A774E1, r8a7742 controller binding - New driver for Xilinx DPDMA controller Other: - Support of out of order dma completion in idxd driver - W=1 warning cleanup of subsystem - Updates to ti-k3-dma, dw, idxd drivers" * tag 'dmaengine-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (68 commits) dmaengine: dw: Don't include unneeded header to platform data header dmaengine: Actions: Add support for S700 DMA engine dmaengine: Actions: get rid of bit fields from dma descriptor dt-bindings: dmaengine: convert Actions Semi Owl SoCs bindings to yaml dmaengine: idxd: add missing invalid flags field to completion dmaengine: dw: Initialize max_sg_burst capability dmaengine: dw: Introduce max burst length hw config dmaengine: dw: Initialize min and max burst DMA device capability dmaengine: dw: Set DMA device max segment size parameter dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config dmaengine: Introduce DMA-device device_caps callback dmaengine: Introduce max SG burst capability dmaengine: Introduce min burst length capability dt-bindings: dma: dw: Add max burst transaction length property dt-bindings: dma: dw: Convert DW DMAC to DT binding dmaengine: ti: k3-udma: Query throughput level information from hardware dmaengine: ti: k3-udma: Use defines for capabilities register parsing dmaengine: xilinx: dpdma: Fix kerneldoc warning dmaengine: xilinx: dpdma: add missing kernel doc dmaengine: xilinx: dpdma: remove comparison of unsigned expression ...

Merge branch 'topic/xilinx' into fixes

2020-08-07T05:43:37Z

Conflicts: Documentation/driver-api/dmaengine/provider.rst include/linux/dmaengine.h