kernel/Documentation/devicetree/bindings/spi, branch linux-5.1.y

spi: sifive: Add DT documentation for SiFive SPI controller

2019-02-19T15:28:43Z

DT documentation for SPI controller added. Signed-off-by: Palmer Dabbelt Signed-off-by: Emil Renner Berthing Signed-off-by: Yash Shah Signed-off-by: Mark Brown

dt-bindings: spi: Add the DMA properties for the SPI dma mode

2019-02-13T12:20:51Z

Add the DMA properties for the SPI dma mode. Signed-off-by: Lanqing Liu Signed-off-by: Baolin Wang Signed-off-by: Mark Brown

dt-bindings: spi: imx: Add an entry for the i.MX8QM compatible

2019-02-12T16:41:12Z

Add an entry for the "fsl,imx8mq-ecspi" compatible to describe the ECSPI version present on i.MX8M. Signed-off-by: Fabio Estevam Signed-off-by: Mark Brown

dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60

2019-02-06T17:21:00Z

The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon Signed-off-by: Mark Brown

dt-bindings: spi: atmel-quadspi: make "pclk" mandatory

2019-02-06T17:20:58Z

Naming clocks is a good practice. Make "pclk" madatory even if we support unnamed clock in the driver, to be backward compatible with old DTs. Suggested-by: Boris Brezillon Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon Signed-off-by: Mark Brown

dt-bindings: spi: atmel-quadspi: update example to new clock binding

2019-02-06T17:20:57Z

Introduced in: commit b60557876849 ("ARM: dts: at91: sama5d2: switch to new clock binding") Signed-off-by: Tudor Ambarus Reviewed-by: Boris Brezillon Signed-off-by: Mark Brown

dt-bindings: spi: add binding file for NXP FlexSPI controller

2019-01-28T12:28:12Z

Add binding file for NXP FlexSPI controller Signed-off-by: Yogesh Narayan Gaur Reviewed-by: Rob Herring Signed-off-by: Mark Brown

spi: stm32: add description about STM32F4 bindings

2019-01-07T18:26:01Z

Add description that STM32F4 can be used in compatible property. Master Inter-Data Idleness optional property cannot be used in STM32F4. Signed-off-by: Cezary Gapinski Signed-off-by: Mark Brown

dt-bindings: spi: Adjust the bindings for the FSL QSPI driver

2019-01-07T16:56:48Z

Adjust the documentation of the new SPI memory interface based driver to reflect the new drivers settings. The "old" driver was using the "fsl,qspi-has-second-chip" property to select one of two dual chip setups (two chips on one bus or two chips on separate buses). And it used the order in which the subnodes are defined in the dt to select the CS, the chip is connected to. Both methods are wrong and in fact the "reg" property should be used to determine which bus and CS a chip is connected to. This also enables us to use different setups than just single chip, or symmetric dual chip. So the porting of the driver from the MTD to the SPI framework actually enforces the use of the "reg" properties and makes "fsl,qspi-has-second-chip" superfluous. As all boards that have "fsl,qspi-has-second-chip" set, also have correct "reg" properties, the removal of this property shouldn't lead to any incompatibilities. The only compatibility issues I can see are with imx6sx-sdb.dts and imx6sx-sdb-reva.dts, which have their reg properties set incorrectly (see explanation here: [2]), all other boards should stay compatible. Also the "big-endian" flag was removed, as this setting is now selected by the driver, depending on which SoC is in use. [2] https://patchwork.ozlabs.org/patch/922817/#1925445 Signed-off-by: Frieder Schrempf Reviewed-by: Rob Herring Signed-off-by: Mark Brown

dt-bindings: spi: Move the bindings for the FSL QSPI driver

2019-01-07T16:56:40Z

Move the documentation of the old SPI NOR driver to the place of the new SPI memory interface based driver. Signed-off-by: Frieder Schrempf Reviewed-by: Rob Herring Signed-off-by: Mark Brown