<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/Documentation/devicetree/bindings/soc/fsl, branch linux-4.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2015-06-03T02:37:24Z</updated>
<entry>
<title>powerpc/qman: Change fsl,qman-channel-id to cell-index</title>
<updated>2015-06-03T02:37:24Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2015-04-17T22:53:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=e9326dea3fe76f38493d1b74999c45707fdc906d'/>
<id>urn:sha1:e9326dea3fe76f38493d1b74999c45707fdc906d</id>
<content type='text'>
It turns out that existing U-Boots will dereference NULL pointers
if the device tree does not have cell-index in the portal nodes.

No patch has yet been merged adding device tree nodes for this binding
(except a dtsi that has not yet been referenced), nor has any driver
yet been merged making use of the binding, so it's not too late to
change the binding in order to keep compatibility with existing
U-Boots.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Cc: Madalin-Cristian Bucur &lt;madalin.bucur@freescale.com&gt;
</content>
</entry>
<entry>
<title>dt/bindings: b/qman: Add phandle to the portals</title>
<updated>2015-01-30T04:57:44Z</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@freescale.com</email>
</author>
<published>2014-12-08T10:29:17Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7af98c7c4dffaf5b0a082fa9c42785d7807e6235'/>
<id>urn:sha1:7af98c7c4dffaf5b0a082fa9c42785d7807e6235</id>
<content type='text'>
This supports SoC(s) with multiple B/QMan instances

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>dt/bindings: b/qman: Fix the alloc-ranges in the example(s)</title>
<updated>2015-01-30T04:57:44Z</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@freescale.com</email>
</author>
<published>2014-12-08T10:29:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=1ee9df499b270f259adc8df9cca396d5ef6e9e46'/>
<id>urn:sha1:1ee9df499b270f259adc8df9cca396d5ef6e9e46</id>
<content type='text'>
'ranges' are specified as &lt;base size&gt; not as &lt;start end&gt;

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>dt/bindings: Introduce the FSL QorIQ DPAA QMan portal(s)</title>
<updated>2014-11-13T05:53:47Z</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@freescale.com</email>
</author>
<published>2014-11-05T15:18:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f3f6743d1b719ba53aa69493bf76b76a8871bbfa'/>
<id>urn:sha1:f3f6743d1b719ba53aa69493bf76b76a8871bbfa</id>
<content type='text'>
Portals are memory mapped interfaces to QMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the QMan

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Change-Id: I29764fa8093b5ce65460abc879446795c50d7185
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>dt/bindings: Introduce the FSL QorIQ DPAA QMan</title>
<updated>2014-11-13T05:53:44Z</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@freescale.com</email>
</author>
<published>2014-11-05T15:18:53Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=76a4f03f3ec7221112c20d053a1233540a601473'/>
<id>urn:sha1:76a4f03f3ec7221112c20d053a1233540a601473</id>
<content type='text'>
The Queue Manager is part of the Data-Path Acceleration Architecture
(DPAA).  QMan supports queuing and QoS scheduling of frames to CPUs,
network interfaces and DPAA logic modules, maintains packet ordering
within flows.  Besides providing flow-level queuing, is also
responsible for congestion management functions such as RED/WRED,
congestion notifications and tail discards.  This binding covers the
CCSR space programming model

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Change-Id: I3acb223893e42003d6c9dc061db568ec0b10d29b
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>dt/bindings: Introduce the FSL QorIQ DPAA BMan portal(s)</title>
<updated>2014-11-13T05:53:41Z</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@freescale.com</email>
</author>
<published>2014-11-05T15:18:52Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5f3af4008bfcb388a3193fd871e1b2e94ba4b09c'/>
<id>urn:sha1:5f3af4008bfcb388a3193fd871e1b2e94ba4b09c</id>
<content type='text'>
Portals are memory mapped interfaces to BMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the BMan

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>dt/bindings: Introduce the FSL QorIQ DPAA BMan</title>
<updated>2014-11-13T05:53:36Z</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@freescale.com</email>
</author>
<published>2014-11-05T15:18:51Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=31ceb157f294843563330658c3ad6e3b5a1c4fe2'/>
<id>urn:sha1:31ceb157f294843563330658c3ad6e3b5a1c4fe2</id>
<content type='text'>
The Buffer Manager is part of the Data-Path Acceleration Architecture
(DPAA).  BMan supports hardware allocation and deallocation of buffers
belonging to pools originally created by software with configurable
depletion thresholds.  This binding covers the CCSR space programming
model

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Change-Id: I3ec479bfb3c91951e96902f091f5d7d2adbef3b2
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
</feed>
