<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/Documentation/devicetree/bindings/serial/samsung_uart.yaml, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
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<updated>2025-10-22T10:04:33Z</updated>
<entry>
<title>dt-bindings: serial: samsung: add samsung,exynos8890-uart compatible</title>
<updated>2025-10-22T10:04:33Z</updated>
<author>
<name>Ivaylo Ivanov</name>
<email>ivo.ivanov.ivanov1@gmail.com</email>
</author>
<published>2025-09-14T13:22:01Z</published>
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<id>urn:sha1:fd3d4f5a62b1e2b0b4c3f16c2904b3af512648d6</id>
<content type='text'>
Add dedicated samsung,exynos8890-uart compatible to the dt-schema for
representing uart of the exynos8890.

Like exynos8895, it has a required DT property samsung,uart-fifosize,
so reuse support for it.

Signed-off-by: Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;
Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://patch.msgid.link/20250914132201.2622955-1-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: Add compatible for ARTPEC-9 SoC</title>
<updated>2025-10-22T10:03:47Z</updated>
<author>
<name>Ravi Patel</name>
<email>ravi.patel@samsung.com</email>
</author>
<published>2025-09-18T03:27:03Z</published>
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<id>urn:sha1:85f17e130dc7189acf03eb0f8e2455c4ea2c4f9e</id>
<content type='text'>
Add Axis ARTPEC-9 uart compatible to the bindings documentation.
It is similar to the older samsung,exynos8895-uart design.

Signed-off-by: Ravi Patel &lt;ravi.patel@samsung.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://patch.msgid.link/20250918032703.8885-1-ravi.patel@samsung.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: add samsung,exynos2200-uart compatible</title>
<updated>2025-07-24T09:40:30Z</updated>
<author>
<name>Ivaylo Ivanov</name>
<email>ivo.ivanov.ivanov1@gmail.com</email>
</author>
<published>2025-07-22T12:08:59Z</published>
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<id>urn:sha1:9e32e4db965fd4e5e95e20b0b02ba03688d7e0de</id>
<content type='text'>
Add dedicated samsung,exynos2200-uart compatible to the dt-schema for
representing uart of the exynos2200.

Like GS101, it has a required DT property samsung,uart-fifosize and
exhibits the 32 bit register access limit, so reuse support for it.

Signed-off-by: Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20250722120859.443283-1-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: add exynos7870-uart compatible</title>
<updated>2025-03-20T15:05:33Z</updated>
<author>
<name>Kaustabh Chakraborty</name>
<email>kauschluss@disroot.org</email>
</author>
<published>2025-02-18T18:52:43Z</published>
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<id>urn:sha1:0a3b5a59fddde2351b752792f8c51bb77fb682e4</id>
<content type='text'>
Document the compatible string for Exynos7870's UART driver. The
devicetree property samsung,uart-fifosize must be mandatory, as the
driver enquires about the FIFO sizes. This feature makes it compatible
with Exynos8895's UART.

Signed-off-by: Kaustabh Chakraborty &lt;kauschluss@disroot.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20250219-exynos7870-uart-v2-1-c8c67f3a936c@disroot.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: Add samsung,exynos8895-uart compatible</title>
<updated>2024-11-04T01:02:42Z</updated>
<author>
<name>Ivaylo Ivanov</name>
<email>ivo.ivanov.ivanov1@gmail.com</email>
</author>
<published>2024-10-23T09:09:01Z</published>
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<id>urn:sha1:52fdb8d4388dd87c0290716ec21ee7756d12b8a3</id>
<content type='text'>
Add dedicated samsung,exynos8895-uart compatible to the dt-schema for
representing uart of the Exynos8895 SoC.

Like GS101, it has a required DT property samsung,uart-fifosize, but
it does not exhibit the 32 bit register access limit.

Signed-off-by: Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20241023090902.538040-2-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: fix maxItems for gs101</title>
<updated>2024-07-31T10:34:30Z</updated>
<author>
<name>André Draszik</name>
<email>andre.draszik@linaro.org</email>
</author>
<published>2024-07-25T07:05:59Z</published>
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<id>urn:sha1:7b09299c8764f612a46ef34b1e8022b0473ad766</id>
<content type='text'>
While gs101 needs exactly two clocks for the UART, the schema doesn't
currently limit the maximum number to this and instead the default of
five from this schema is applied.

Update the schema accordingly.

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: André Draszik &lt;andre.draszik@linaro.org&gt;
Link: https://lore.kernel.org/r/20240725-gs101-uart-binding-v5-2-e237be8253a9@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: avoid duplicating permitted clock-names</title>
<updated>2024-07-31T10:34:30Z</updated>
<author>
<name>André Draszik</name>
<email>andre.draszik@linaro.org</email>
</author>
<published>2024-07-25T07:05:58Z</published>
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<id>urn:sha1:9da89fe1b9ffb00dd961a809240f47452402ed2b</id>
<content type='text'>
This binding currently duplicates the permitted clock-names in various
places, and when adding more compatibles, clock-names will have to be
duplicated even more.

The reason is:
1) subschemas (-if: ...), still have to match the top-level:
       pattern: '^clk_uart_baud[0-3]$'
2) there is one compatible that doesn't follow sequential numbering for
   the clock names (samsung,s3c6400-uart)
3) when limiting the number of clock-names, we also want to enforce
   sequential names
Because of 1) and 2), the patterns can not simply be changed to
constant strings, and later overridden in a different subschema (for
samsung,s3c6400-uart only).

Since we can't populate the top-level clock-names based on the
compatible, and because when limiting the number of items we generally
want sequential numbers and not a pattern, move the permitted strings
into a subschema of its own and populate it based on the compatible:
    * 'uart clk_uart_baud2 clk_uart_baud3' for the one outlier
    * 'uart clk_uart_baud0..3' for everything else

This way we can avoid having to duplicate the permitted names
everywhere.

While at it, add blank lines as per the universal style, which is to
have blank lines between properties, except where they are booleans.

Also add another example using a compatible that uses the default
clock-names scheme, as opposed to the existing example that uses
samsung,s3c6400-uart's non-default clock-names. This allows testing
both versions of the clock-names property when running
dt_binding_check.

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: André Draszik &lt;andre.draszik@linaro.org&gt;
Link: https://lore.kernel.org/r/20240725-gs101-uart-binding-v5-1-e237be8253a9@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: do not allow reg-io-width for gs101</title>
<updated>2024-01-28T03:05:18Z</updated>
<author>
<name>Tudor Ambarus</name>
<email>tudor.ambarus@linaro.org</email>
</author>
<published>2024-01-19T10:45:09Z</published>
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<id>urn:sha1:1d3f02abd551c69c6a82b9f22430b497b0bf7c55</id>
<content type='text'>
All gs101 serial ports are restricted to 32-bit register accesses.
This requirement will be inferred from the compatible. Do not allow
the reg-io-width property for the google,gs101-uart compatible.

Suggested-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Link: https://lore.kernel.org/r/20240119104526.1221243-3-tudor.ambarus@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property</title>
<updated>2023-12-12T19:22:42Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2023-12-11T16:23:19Z</published>
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<id>urn:sha1:2072496129b7d7448f969b6334b4fd2e876a642d</id>
<content type='text'>
Specifying samsung,uart-fifosize in both DT and driver static data is error
prone and relies on driver probe order and dt aliases to be correct.

Additionally on many Exynos platforms these are (USI) universal serial
interfaces which can be uart, spi or i2c, so it can change per board.

For google,gs101-uart make samsung,uart-fifosize a required property.
For this platform fifosize now *only* comes from DT.

Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Link: https://lore.kernel.org/r/20231211162331.435900-5-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: samsung: Add google-gs101-uart compatible</title>
<updated>2023-12-12T19:22:42Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2023-12-11T16:23:18Z</published>
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<id>urn:sha1:bad3bc0a23b74e7b353978b6f58eed6c0f3b51a0</id>
<content type='text'>
Add dedicated google-gs101-uart compatible to the dt-schema for
representing uart of the Google Tensor gs101 SoC.

Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Link: https://lore.kernel.org/r/20231211162331.435900-4-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
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