kernel/Documentation/devicetree/bindings/net/dsa, branch linux-rolling-stable

dt-bindings: Updates Linus Walleij's mail address

2025-12-16T16:17:59Z

My name is stamped into maintainership for a big slew of DT bindings. Now that it is changing, switch it over to my kernel.org mail address, which will hopefully be stable for the rest of my life. Signed-off-by: Linus Walleij Link: https://patch.msgid.link/20251216-maintainers-dt-v1-1-0b5ab102c9bb@kernel.org Signed-off-by: Rob Herring (Arm)

dt-bindings: net: dsa: lantiq,gswip: add support for MaxLinear GSW1xx switches

2025-11-06T22:16:17Z

Extend the Lantiq GSWIP device tree binding to also cover MaxLinear GSW1xx switches which are based on the same hardware IP but connected via MDIO instead of being memory-mapped. Add compatible strings for MaxLinear GSW120, GSW125, GSW140, GSW141, and GSW145 switches and adjust the schema to handle the different connection methods with conditional properties. Add MaxLinear GSW125 example showing MDIO-connected configuration. Signed-off-by: Daniel Golle Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/fc96f1dedb2b418a63e69960356dde7f6eb86424.1762170107.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: lantiq,gswip: add support for MII delay properties

2025-11-06T22:16:17Z

Add support for standard tx-internal-delay-ps and rx-internal-delay-ps properties on port nodes to allow fine-tuning of RGMII clock delays. The GSWIP switch hardware supports delay values in 500 picosecond increments from 0 to 3500 picoseconds, with a post-reset default of 2000 picoseconds for both TX and RX delays. The driver currently sets the delay to 0 in case the PHY is setup to carry out the delay by the corresponding interface modes ("rgmii-id", "rgmii-rxid", "rgmii-txid"). This corresponds to the driver changes that allow adjusting MII delays using Device Tree properties instead of relying solely on the PHY interface mode. Signed-off-by: Daniel Golle Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/9e007d4f85c2c6d69e0b91f3663d99e0f6fc8eac.1762170107.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: lantiq,gswip: add MaxLinear RMII refclk output property

2025-11-06T22:16:16Z

Add support for the maxlinear,rmii-refclk-out boolean property on port nodes to configure the RMII reference clock to be an output rather than an input. This property is only applicable for ports in RMII mode and allows the switch to provide the reference clock for RMII-connected PHYs instead of requiring an external clock source. This corresponds to the driver changes that read this Device Tree property to configure the RMII clock direction. Signed-off-by: Daniel Golle Reviewed-by: Alexander Sverdlin Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/9813bb916ecce9bae366e6c50c081014fe5371ea.1762170107.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: yt921x: Add Motorcomm YT921x switch support

2025-10-22T01:25:30Z

The Motorcomm YT921x series is a family of Ethernet switches with up to 8 internal GbE PHYs and up to 2 GMACs. Signed-off-by: David Yang Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20251017060859.326450-2-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: nxp,sja1105: Add optional clock

2025-10-15T15:55:40Z

Add optional clock for OSC_IN and fix the below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dtb: switch@0 (nxp,sja1105q): Unevaluated properties are not allowed ('clocks' was unexpected) Signed-off-by: Frank Li Acked-by: Conor Dooley Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/20251010183418.2179063-1-Frank.Li@nxp.com Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: nxp,sja1105: Add reset-gpios property

2025-09-26T22:19:22Z

Both the nxp,sja1105 and the nxp,sja1110 series feature an active-low reset pin, rendering reset-gpios a valid property for all of the nxp,sja1105 family. Acked-by: Vladimir Oltean Reviewed-by: Rob Herring (Arm) Reviewed-by: Frank Li Signed-off-by: Jonas Rebmann Link: https://patch.msgid.link/20250924-imx8mp-prt8ml-v3-1-f498d7f71a94@pengutronix.de Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: microchip: Add strap description to set SPI mode

2025-09-22T23:31:17Z

At reset, KSZ8463 uses a strap-based configuration to set SPI as interface bus. If the required pull-ups/pull-downs are missing (by mistake or by design to save power) the pins may float and the configuration can go wrong preventing any communication with the switch. Add a 'reset' pinmux state Add a KSZ8463 specific strap description that can be used by the driver to drive the strap pins during reset. Two GPIOs are used. Users must describe either both of them or none of them. Signed-off-by: Bastien Curutchet (Schneider Electric) Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250918-ksz-strap-pins-v3-2-16662e881728@bootlin.com Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: microchip: Group if clause under allOf tag

2025-09-22T23:31:17Z

Upcoming patch adds a new if/then clause. It requires to be grouped with the already existing if/then clause under an 'allOf:' tag. Move the if/then clause under the already existing 'allOf:' tag to prepare next patch. Acked-by: Rob Herring (Arm) Signed-off-by: Bastien Curutchet (Schneider Electric) Link: https://patch.msgid.link/20250918-ksz-strap-pins-v3-1-16662e881728@bootlin.com Signed-off-by: Jakub Kicinski

dt-bindings: net: dsa: microchip: Add KSZ8463 switch support

2025-07-26T00:01:56Z

KSZ8463 switch is a 3-port switch based from KSZ8863. Its register access is significantly different from the other KSZ SPI switches. Signed-off-by: Tristram Ha Acked-by: Krzysztof Kozlowski Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20250725001753.6330-2-Tristram.Ha@microchip.com Signed-off-by: Jakub Kicinski