kernel/Documentation/devicetree/bindings/mmc, branch linux-5.1.yHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y2019-05-22T05:39:46Zdt-bindings: mmc: Add disable-cqe-dcmd property.2019-05-22T05:39:46ZChristoph Muellnerchristoph.muellner@theobroma-systems.com2019-03-22T11:38:04Zurn:sha1:c625191a772d5f63f14ab3e7562fa57fc6f7a34c
commit 28f22fb755ecf9f933f045bc0afdb8140641b01c upstream.
Add disable-cqe-dcmd as optional property for MMC hosts.
This property allows to disable or not enable the direct command
features of the command queue engine.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: mmc: Add supports-cqe property2019-02-25T07:40:58ZSowjanya Komatineniskomatineni@nvidia.com2019-01-23T19:30:51Zurn:sha1:c7fddbd5db5cffd10ed4d18efa20e36803d1899f
Add supports-cqe optional property for MMC hosts.
This property is used to identify the specific host controller
supporting command queue.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dt-bindings: mmc: tegra: Add pinctrl for SDMMC drive strengths2019-02-25T07:40:58ZSowjanya Komatineniskomatineni@nvidia.com2019-01-10T22:46:01Zurn:sha1:7c3cf5c9322bfde8c8038c1428bf8ecd4c58eff3
Add pinctrls for 3V3 and 1V8 pad drive strength configuration for
Tegra210 sdmmc.
Tegra210 sdmmc has pad configuration registers in pinmux register
domain and handled thru pinctrl to pinmux device node.
Tegra186 and Tegra194 has pad configuration register with in the
SDMMC register domain itself and are handles thru drive strength
properties in sdmmc device node.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
mmc: dt-bindings: omap: Remove duplicate documentation paragraphs2019-02-25T07:40:58ZMike Maslenkinmike.maslenkin@gmail.com2018-12-28T22:50:52Zurn:sha1:204d94e63e22d4bd4e8ce8af1aeeda2208822cd0
Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dt-bindings: mmc: fsl-imx-esdhc: add imx6ull compatible string2019-02-25T07:40:58ZBOUGH CHENhaibo.chen@nxp.com2018-12-28T03:26:04Zurn:sha1:772bf73ed4dc2e3f0aa549d91dd3f306399d0c09
Add a imx6ull compatible string to be able to manage erratum ERR010450 on
i.MX6ULL.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dt-bindings: mmc: renesas_sdhi: Add r8a774c0 support2018-12-17T08:01:53ZFabrizio Castrofabrizio.castro@bp.renesas.com2018-12-13T20:22:09Zurn:sha1:ab409be2be555e61516214885537dcb619f12e9e
Document RZ/G2E (R8A774C0) SoC bindings.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dt-bindings: sdhci-omap: Add note for cpu_thermal2018-12-17T07:26:24ZFaiz Abbasfaiz_abbas@ti.com2018-12-11T14:22:52Zurn:sha1:58fe8bbacd285af44831f68da1d2d50f0e2fc9a9
The driver fetches a thermal zone using the string "cpu_thermal" for
tuning operation. Add a note for the same.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dt-bindings: mmc: sdhci-of-arasan: Add deprecated message for AM652018-12-17T07:26:24ZFaiz Abbasfaiz_abbas@ti.com2018-12-10T18:35:06Zurn:sha1:49d14adb0031e380e6a0d52d2b853a7f8db3f65f
Commit 26a4f38d1316 ("dt-bindings: mmc: sdhci-of-arasan: Add new
compatible for AM654 MMC PHY") added a new compatible for supporting
controllers on TI's AM65x SOCs. It turns out that the controller is
not compatible with the arasan driver's phy and consumer model as it
requires some phy registers for core sdhci functionality. This calls
for the binding to branch out to a new driver.
Therefore, add a deprecated message for the ti,am654-sdhci-5.1 binding.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dt-bindings: mmc: sdhci-am654: Document bindings for the host controllers on TI's AM654 SOCs2018-12-17T07:26:24ZFaiz Abbasfaiz_abbas@ti.com2018-12-10T18:35:05Zurn:sha1:f98b4f98bbc823d2f376f2c6c33d21bde20423cf
Add binding documentation for mmc host controllers present on TI's AM654
SOCs.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dt-bindings: mmc: sdhci-msm: Clarify register requirements2018-12-17T07:26:24ZEvan Greenevgreen@chromium.org2018-11-28T22:34:26Zurn:sha1:67b4ff9fb796d8e572a9bb82d851639a81812aa9
In sdhci-msm-v5 and beyond, the MCI registers are removed, so there is only
one register region required.
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>