<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/Documentation/devicetree/bindings/mips/mscc.txt, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2020-11-12T22:31:27Z</updated>
<entry>
<title>dt-bindings: mips: Add Serval and Jaguar2</title>
<updated>2020-11-12T22:31:27Z</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@bootlin.com</email>
</author>
<published>2020-11-10T11:45:01Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=597fa616c49ae06a1a307750a7df9b59205f462f'/>
<id>urn:sha1:597fa616c49ae06a1a307750a7df9b59205f462f</id>
<content type='text'>
Serval and Jaguar2 SoCs belong to the same family as Ocelot and Luton.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mips: Add Luton</title>
<updated>2020-11-12T22:30:55Z</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@bootlin.com</email>
</author>
<published>2020-11-10T11:45:00Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=fc3553cb9fc5fee18299b599040d2cc2eb17666d'/>
<id>urn:sha1:fc3553cb9fc5fee18299b599040d2cc2eb17666d</id>
<content type='text'>
Luton SoC belongs to the same family as Ocelot.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: net: ocelot: remove hsio from the list of register address spaces</title>
<updated>2018-10-05T21:36:43Z</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@bootlin.com</email>
</author>
<published>2018-10-04T12:21:59Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6afea95a80668b8e4fbde8ad21ba3949050e192f'/>
<id>urn:sha1:6afea95a80668b8e4fbde8ad21ba3949050e192f</id>
<content type='text'>
HSIO register address space should be handled outside of the MAC
controller as there are some registers for PLL5 configuring,
SerDes/switch port muxing and a thermal sensor IP, so let's remove it.

Acked-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@bootlin.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mips: Add bindings for Microsemi SoCs</title>
<updated>2018-03-21T23:32:32Z</updated>
<author>
<name>Alexandre Belloni</name>
<email>alexandre.belloni@bootlin.com</email>
</author>
<published>2018-03-20T13:07:57Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=2707177e86ec9b25c0988c2cc827acbae409b376'/>
<id>urn:sha1:2707177e86ec9b25c0988c2cc827acbae409b376</id>
<content type='text'>
Add bindings for Microsemi SoCs. Currently only Ocelot is supported.

Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Reviewed-by: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Allan Nielsen &lt;Allan.Nielsen@microsemi.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18854/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
</feed>
