kernel/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml, branch linux-rolling-stableHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable2025-09-26T19:50:43Zdt-bindings: interrupt-controller: qcom,pdc: Document Glymur PDC2025-09-26T19:50:43ZPankaj Patilpankaj.patil@oss.qualcomm.com2025-09-18T14:02:49Zurn:sha1:4379fbb9b06c8c17dac63652cfc2a7ada96c5074
Document compatible for the Power Domain Controller(PDC)
block on Glymur.PDC acts as interrupt controller in
SoC states where GIC is non-operational.
Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: interrupt-controller: qcom,pdc: Document SM8750 PDC2025-01-07T15:10:11ZMelody Olveraquic_molvera@quicinc.com2024-12-04T22:53:37Zurn:sha1:6143cc1d9e5503074b1ed41a5721f1c2da083f62
Document the PDC block on the SM8750 SoC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Link: https://lore.kernel.org/r/20241204-sm8750_master_pdc-v1-1-3a06cb62a28f@quicinc.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: qcom,pdc: document QCS8300 Power Domain Controller2025-01-07T14:35:34ZJingyi Wangquic_jingyw@quicinc.com2024-09-11T08:03:15Zurn:sha1:715e36194d6a0c04b7b57f8085952a90f2415d76
Document Power Domain Controller for Qualcomm QCS8300. PDC is included
in QCS8300 SoC. This controller acts as an interrupt controller, enabling
the detection of interrupts when the GIC is non-operational.
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240911-qcs8300_binding-v2-1-de8641b3eaa1@quicinc.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: qcom,pdc: document QCS615 Power Domain Controller2025-01-07T14:35:34ZLijuan Gaoquic_lijuang@quicinc.com2024-11-04T09:10:09Zurn:sha1:9a3c545b61ca574868cf624b1fb7ed5d66e86bd3
Add a compatible for the Power Domain Controller on QCS615 platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-2-9dde8d7b80b0@quicinc.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: interrupt-controller: qcom,pdc: Add SAR2130P compatible2024-11-08T21:10:05ZDmitry Baryshkovdmitry.baryshkov@linaro.org2024-10-17T18:13:01Zurn:sha1:919e0dd4118ee6fafd2d63d31ecf0c98fec7a152
Document compatible for PDC interrupt controller on SAR2130P platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241017-sar2130p-pdc-v1-1-cf9ccd9c37da@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: interrupt-controller: qcom-pdc: document support for SA8255p2024-09-13T19:01:34ZNikunj Kelaquic_nkela@quicinc.com2024-09-05T19:15:10Zurn:sha1:7bab88f173af2991df1ef4ff5d81292f58114d10
Add compatible for pdc interrupt controller representing support on
SA8255p.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Link: https://lore.kernel.org/r/20240905191510.3775179-1-quic_nkela@quicinc.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: interrupt-controller: qcom,pdc: Add sc8180x PDC2024-07-08T23:40:30ZBjorn Anderssonquic_bjorande@quicinc.com2024-05-25T18:05:31Zurn:sha1:e69956584ddf90b83fa89b113f4960b8d653d4d2
The SC8180X platform has a PDC block, add a compatible for this.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240525-sc8180x-pdc-binding-compatible-v1-1-17031c85ed69@quicinc.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: interrupt-controller: qcom,pdc: document pdc on X1E801002023-11-28T19:21:59ZSibi Sankarquic_sibis@quicinc.com2023-11-24T10:06:08Zurn:sha1:daa9249408fcb4985351d91f166fc0e27d255014
The X1E80100 SoC includes a PDC, document it.
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124100608.29964-6-quic_sibis@quicinc.com
Signed-off-by: Rob Herring <robh@kernel.org>
dt-bindings: qcom,pdc: document the SM8650 Power Domain Controller2023-11-28T19:21:59ZNeil Armstrongneil.armstrong@linaro.org2023-10-25T07:27:36Zurn:sha1:c1c647f604a55e73c6980046cc56df574402e362
Document the Power Domain Controller on the SM8650 Platform.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-bindings-pdc-v1-1-42f62cc9858c@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
dt-bindings: interrupt-controller: Add SDX75 PDC compatible2023-11-28T19:21:59ZRohit Agarwalquic_rohiagar@quicinc.com2023-11-17T08:28:29Zurn:sha1:ca41ae8f445e0bb88fa84584b451bfbf39b2e7f1
Add device tree bindings for PDC on SDX75 SOC.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231117082829.609882-1-quic_rohiagar@quicinc.com
Signed-off-by: Rob Herring <robh@kernel.org>