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<title>kernel/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2022-12-02T13:57:14Z</updated>
<entry>
<title>dt-bindings: x86: apic: Introduce new optional bool property for lapic</title>
<updated>2022-12-02T13:57:14Z</updated>
<author>
<name>Rahul Tanwar</name>
<email>rtanwar@maxlinear.com</email>
</author>
<published>2022-11-24T08:41:41Z</published>
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<id>urn:sha1:b3a9801cccefda304263b4e84e9dfe49057f3c29</id>
<content type='text'>
X86 defines a few possible interrupt delivery modes. With respect to
boot/init time, mainly two interrupt delivery modes are possible.

 - PIC Mode: Legacy external 8259 compliant PIC interrupt controller
 - Virtual Wire Mode: Use lapic as virtual wire interrupt delivery mode

ACPI and MPS spec compliant systems provide this information, but for OF
based systems, it is by default set to PIC mode.

In fact it is hardcoded to legacy PIC mode for OF based x86 systems with no
option to choose the configuration between PIC mode &amp; virtual wire mode.

For this purpose, introduce a new boolean property for the lapic interrupt
controller node which allows to configure it for virtual wire mode as well.

Property name: 'intel,virtual-wire-mode'
Type: Boolean

If not present/not defined, interrupt delivery mode defaults to legacy PIC
mode. If present/defined, interrupt delivery mode is set to virtual wire
mode.

Suggested-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Rahul Tanwar &lt;rtanwar@maxlinear.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20221124084143.21841-3-rtanwar@maxlinear.com

</content>
</entry>
<entry>
<title>dt-bindings: x86: apic: Convert Intel's APIC bindings to YAML schema</title>
<updated>2022-12-02T13:57:13Z</updated>
<author>
<name>Rahul Tanwar</name>
<email>rtanwar@maxlinear.com</email>
</author>
<published>2022-11-24T08:41:40Z</published>
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<id>urn:sha1:2b822f474621bb2f4f21dd6dae6900e2ccca7e95</id>
<content type='text'>
The DT bindings for X86 local APIC (lapic) and I/O APIC (ioapic) are
outdated. Rework them:

   - Convert the bindings for lapic and ioapic from text to YAML schema.
   - Separate lapic &amp; ioapic schemas.
   - Add missing but required standard properties
   - Add missing descriptions

Suggested-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Rahul Tanwar &lt;rtanwar@maxlinear.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20221124084143.21841-2-rtanwar@maxlinear.com

</content>
</entry>
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