<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/Documentation/devicetree/bindings/firmware, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
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<updated>2019-01-25T14:51:16Z</updated>
<entry>
<title>dt-bindings: firmware: tegra186-bpmp: Remove name property</title>
<updated>2019-01-25T14:51:16Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-01-25T14:47:40Z</published>
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<id>urn:sha1:22daf9104902456654da984a31989301b4151967</id>
<content type='text'>
This property is not used by device trees and was likely supposed to be
a hint as to what the BPMP node should be named, rather than describing
a property of the BPMP node.

Suggested-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: firmware: Add bindings for Tegra210 BPMP</title>
<updated>2019-01-25T14:51:16Z</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2019-01-24T17:03:55Z</published>
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<id>urn:sha1:0e79cb7010f237a1d63b74cbfa51783eb162a3b2</id>
<content type='text'>
The BPMP is a specific processor in Tegra210 chip, which is designed
for boot process handling, assisting in entering deep low power states
(suspend to ram), and offloading DRAM memory clock scaling on some
platforms.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings, firmware: add Intel Stratix10 service layer binding</title>
<updated>2018-11-26T19:13:50Z</updated>
<author>
<name>Richard Gong</name>
<email>richard.gong@intel.com</email>
</author>
<published>2018-11-13T18:13:59Z</published>
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<id>urn:sha1:a2c1c192656b701939b9028646b8a8bb90edd911</id>
<content type='text'>
Add a device tree binding for the Intel Stratix10 service layer driver

Signed-off-by: Richard Gong &lt;richard.gong@intel.com&gt;
Signed-off-by: Alan Tull &lt;atull@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx into next/drivers</title>
<updated>2018-10-10T11:47:06Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-10-10T11:46:19Z</published>
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<id>urn:sha1:e4c080a10a23577303c0ef05c37c18661f758f34</id>
<content type='text'>
arm64: zynqmp: SoC CLK changes for v4.20

This patchset adds CCF compliant clock driver for ZynqMP.
Clock driver queries supported clock information from firmware
and regiters pll and output clocks with CCF.

* tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx:
  drivers: clk: Add ZynqMP clock driver
  dt-bindings: clock: Add bindings for ZynqMP clock driver
  firmware: xilinx: Add zynqmp IOCTL API for device control
  Documentation: xilinx: Add documentation for eemi APIs

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add bindings for ZynqMP clock driver</title>
<updated>2018-10-09T11:26:34Z</updated>
<author>
<name>Rajan Vaja</name>
<email>rajan.vaja@xilinx.com</email>
</author>
<published>2018-10-08T18:21:45Z</published>
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<id>urn:sha1:26372d0973febfc62f20a4afd38fc51623682459</id>
<content type='text'>
Add documentation to describe Xilinx ZynqMP clock driver
bindings.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers</title>
<updated>2018-10-02T08:11:12Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-10-02T08:11:05Z</published>
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<id>urn:sha1:64d20b774f49b31e9d5ebe413d5c3d37195e9a64</id>
<content type='text'>
Qualcomm ARM Based Driver Updates for v4.20

* Refactor of SCM compatibles and clock requirements
* SMEM cleanup
* Add LLCC EDAC driver
* Fixes for GENI clocks and macros
* Fix includes for llcc-slice and smem
* String overflow fixes for APR and wcnss_ctrl
* Fixup for COMPILE_TEST of qcom driver Kconfigs
* Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p
* Add SCM dependencies to SPM and rmtfs-mem

* tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (38 commits)
  soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples
  soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()
  soc: qcom: geni: Make version macros simpler
  dt-bindings: firmware: scm: Add MSM8998 and SDM845
  firmware: qcom: scm: Refactor clock handling
  dt-bindings: firmware: scm: Refactor compatibles and clocks
  soc: qcom: smem: a few last cleanups
  soc: qcom: smem: verify partition host ids match
  soc: qcom: smem: small change in global entry loop
  soc: qcom: smem: verify partition offset_free_uncached
  soc: qcom: smem: verify partition header size
  soc: qcom: smem: introduce qcom_smem_partition_header()
  soc: qcom: smem: require order of host ids to match
  soc: qcom: smem: verify both host ids in partition header
  soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions()
  soc: qcom: smem: always ignore partitions with 0 offset or size
  soc: qcom: smem: initialize region struct only when successful
  soc: qcom: smem: rename variable in qcom_smem_get_global()
  drivers: qcom: rpmh-rsc: clear wait_for_compl after use
  soc: qcom: rmtfs-mem: Validate that scm is available
  ...

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: firmware: Add bindings for ZynqMP firmware</title>
<updated>2018-09-26T06:47:30Z</updated>
<author>
<name>Rajan Vaja</name>
<email>rajanv@xilinx.com</email>
</author>
<published>2018-09-12T19:38:35Z</published>
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<id>urn:sha1:95bf69a22d97d6dc1802feef164b34d57280a77d</id>
<content type='text'>
Add documentation to describe Xilinx ZynqMP firmware driver
bindings. Firmware driver provides an interface to firmware
APIs. Interface APIs can be used by any driver to communicate
to PMUFW (Platform Management Unit).

Signed-off-by: Rajan Vaja &lt;rajanv@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: firmware: scm: Add MSM8998 and SDM845</title>
<updated>2018-09-14T05:32:01Z</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2018-08-29T23:15:05Z</published>
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<id>urn:sha1:bb85ce5122487b2b1de1b48b557c5fdf9828dc6e</id>
<content type='text'>
Now that the compatible/clock handling is reworked add compatibles for
MSM8998 and SDM845 to the SCM binding.

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: firmware: scm: Refactor compatibles and clocks</title>
<updated>2018-09-14T05:31:40Z</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2018-08-29T23:15:03Z</published>
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<id>urn:sha1:8a07855e66e6b8ddf452d81c6aac0b1ff3665e86</id>
<content type='text'>
When the binding was written all "future" platforms required three
clocks, so the default compatible (qcom,scm) was defined to require
this. But as history shows all "future" platforms actually lack required
clocks. Given how the binding is written these compatibles have to be
added as an exception to the default.

Refactor the description of compatible to define that a platform
compatible should be given, followed by the fallback of qcom,scm. Also
refactor the description of the clocks in a way that this does not need
to be updated as new platform specific compatibles are added.

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware: qcom: scm: Add ipq4019 soc compatible</title>
<updated>2018-04-25T05:10:33Z</updated>
<author>
<name>Sricharan R</name>
<email>sricharan@codeaurora.org</email>
</author>
<published>2018-03-23T10:18:44Z</published>
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<id>urn:sha1:53e51b4abeba149ca510e87339b1eb97db1c34fb</id>
<content type='text'>
Add the compatible for ipq4019.
This does not need clocks to do scm calls.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
Acked-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
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