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<title>kernel/Documentation/devicetree/bindings/clock/st, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
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<updated>2018-06-15T21:11:26Z</updated>
<entry>
<title>docs: Fix more broken references</title>
<updated>2018-06-15T21:11:26Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab+samsung@kernel.org</email>
</author>
<published>2018-05-08T18:14:57Z</published>
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<id>urn:sha1:34962fb8070cb5a60b686a5ee11f81f2978836bd</id>
<content type='text'>
As we move stuff around, some doc references are broken. Fix some of
them via this script:
	./scripts/documentation-file-ref-check --fix

Manually checked that produced results are valid.

Acked-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Acked-by: Takashi Iwai &lt;tiwai@suse.de&gt;
Acked-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Acked-by: Miguel Ojeda &lt;miguel.ojeda.sandonis@gmail.com&gt;
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+samsung@kernel.org&gt;
Acked-by: Jonathan Corbet &lt;corbet@lwn.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Remove leading zeros from bindings notation</title>
<updated>2017-11-09T23:05:05Z</updated>
<author>
<name>Marco Franchi</name>
<email>marco.franchi@nxp.com</email>
</author>
<published>2017-11-08T16:27:48Z</published>
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<id>urn:sha1:48c926cd3414c7e628909f6f831394184816da87</id>
<content type='text'>
Improve the binding example by removing all the leading zeros to fix the
following dtc warnings:

Warning (unit_address_format): Node /XXX unit name should not have leading 0s

Converted using the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"`

Some unnecessary changes were manually fixed.

Signed-off-by: Marco Franchi &lt;marco.franchi@nxp.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>drivers: clk: st: Handle clk synchronous mode for video clocks</title>
<updated>2016-09-16T23:01:41Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@st.com</email>
</author>
<published>2016-08-29T12:26:58Z</published>
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<id>urn:sha1:cb80ec768a0db73743a6f8b5d94c0b52b97e3ca4</id>
<content type='text'>
This patch configures the semi-synchronous mode of the video clocks
of clkgenD2.

Signed-off-by: Olivier Bideau &lt;olivier.bideau@st.com&gt;
Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@st.com&gt;
Acked-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>drivers: clk: st: Add clock propagation for audio clocks</title>
<updated>2016-09-16T23:01:39Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@st.com</email>
</author>
<published>2016-08-29T12:26:57Z</published>
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<id>urn:sha1:26bd0a57755df51a34037d8151a443cec3688b80</id>
<content type='text'>
This patch allows fine tuning of the quads FS for audio clocks
accuracy.

Signed-off-by: Olivier Bideau &lt;olivier.bideau@st.com&gt;
Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@st.com&gt;
Acked-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>drivers: clk: st: Simplify clock binding of STiH4xx platforms</title>
<updated>2016-09-16T23:01:36Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@st.com</email>
</author>
<published>2016-08-29T12:26:54Z</published>
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<id>urn:sha1:880d54ff564181b4d9fff31f7f81807cf60cd85d</id>
<content type='text'>
This patch reworks the clock binding to avoid too much detail in DT.
Now we have only compatible string per type of clock
(remark from Rob https://lkml.org/lkml/2016/5/25/492)

Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@st.com&gt;
Acked-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>drivers: clk: st: Remove stih415-416 clock support</title>
<updated>2016-09-16T23:01:34Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@st.com</email>
</author>
<published>2016-08-29T12:26:53Z</published>
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<id>urn:sha1:7df404c9856deec4cea1538ef4786116e3fbf2e5</id>
<content type='text'>
STiH415 and STiH416 platforms are no longer used.
these platforms will be deprecated for the next kernel.

Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@st.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>Documentation: dt: clock: fix spelling mistakes</title>
<updated>2016-04-25T13:40:35Z</updated>
<author>
<name>Eric Engestrom</name>
<email>eric@engestrom.ch</email>
</author>
<published>2016-04-25T00:24:06Z</published>
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<id>urn:sha1:d7fb8300d732a999c034ef4707d150d5579c27a8</id>
<content type='text'>
Signed-off-by: Eric Engestrom &lt;eric@engestrom.ch&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
[robh: s/describe/described/]
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>drivers: clk: st: Correct the pll-type for A9 for stih418</title>
<updated>2015-10-09T06:52:59Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@linaro.org</email>
</author>
<published>2015-10-07T09:08:58Z</published>
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<id>urn:sha1:0829ea5af6d3338c3c5ad0bd377d75a30d6ffc8b</id>
<content type='text'>
Add support for new PLL-type for stih418 A9-PLL.
Currently the 407_A9_PLL type being used, it is corrected with this patch
4600c28 PLL allows to reach higher frequencies
so its programming algorithm is extended.

Signed-off-by: Pankaj Dev &lt;pankaj.dev@st.com&gt;
Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x</title>
<updated>2015-07-22T09:41:33Z</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@linaro.org</email>
</author>
<published>2015-06-23T14:09:00Z</published>
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<id>urn:sha1:5eb26c60590983e11f567916a83d1f0a70986553</id>
<content type='text'>
Use a generic name for this kind of PLL

Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@linaro.org&gt;
Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
</content>
</entry>
<entry>
<title>clk: st: Spelling s/stucture/structure/</title>
<updated>2014-10-29T13:41:02Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2014-10-22T09:50:40Z</published>
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<id>urn:sha1:994bef1094500f78f36d0df56b5c0c58c73a7492</id>
<content type='text'>
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Signed-off-by: Jiri Kosina &lt;jkosina@suse.cz&gt;
</content>
</entry>
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