<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
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<updated>2022-11-08T04:47:27Z</updated>
<entry>
<title>dt-bindings: clock: qcom: Clean-up titles and descriptions</title>
<updated>2022-11-08T04:47:27Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-11-02T16:31:53Z</published>
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<id>urn:sha1:ece3c3198182a13825a7f02844894ba6a03d58d1</id>
<content type='text'>
Clean the Qualcomm SoCs clock bindings:
1. Drop redundant "bindings" in title.
2. Correct language grammar "&lt;independent clause without verb&gt;, which
   supports" -&gt; "provides".
3. Use full path to the bindings header, so tools can validate it.
4. Drop quotes where not needed.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt; # msm8998
Acked-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt; # mmcc
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20221102163153.55460-2-krzysztof.kozlowski@linaro.org
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add A7 PLL binding for SDX65</title>
<updated>2022-03-08T22:17:40Z</updated>
<author>
<name>Rohit Agarwal</name>
<email>quic_rohiagar@quicinc.com</email>
</author>
<published>2022-02-22T04:56:21Z</published>
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<id>urn:sha1:2cabc45237659cb3b0294c8b8ae12f5fd0dad28d</id>
<content type='text'>
Add information for Cortex A7 PLL clock in Qualcomm
platform SDX65.

Signed-off-by: Rohit Agarwal &lt;quic_rohiagar@quicinc.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/1645505785-2271-2-git-send-email-quic_rohiagar@quicinc.com
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add Qualcomm A7 PLL binding</title>
<updated>2021-02-08T17:46:23Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2021-01-18T04:11:54Z</published>
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<id>urn:sha1:ee778e069dd49cf476f3939d62f31346cf730080</id>
<content type='text'>
Add devicetree YAML binding for Cortex A7 PLL clock in Qualcomm
platforms like SDX55.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://lore.kernel.org/r/20210118041156.50016-4-manivannan.sadhasivam@linaro.org
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
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