<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/Documentation/devicetree/bindings/arm/tegra, branch linux-4.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2015-04-22T16:09:46Z</updated>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-04-22T16:09:46Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-04-22T16:09:46Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=5c73cc4b6c83e88863a5de869cc5df3b913aef4a'/>
<id>urn:sha1:5c73cc4b6c83e88863a5de869cc5df3b913aef4a</id>
<content type='text'>
Pull ARM DT updates from Olof Johansson:
 "As always, this tends to be one of our bigger branches.  There are
  lots of updates this release, but not that many jumps out as something
  that needs more detailed coverage.  Some of the highlights are:

   - DTs for the new Annapurna Labs Alpine platform

   - more graphics DT pieces falling into place on Exynos, bridges,
     clocks.

   - plenty of DT updates for Qualcomm platforms for various IP blocks

   - some churn on Tegra due to switch-over to tool-generated pinctrl
     data

   - misc fixes and updates for Atmel at91 platforms

   - various DT updates to add IP block support on Broadcom's Cygnus
     platforms

   - more updates for Renesas platforms as DT support is added for
     various IP blocks (IPMMU, display, audio, etc)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits)
  ARM: dts: alpine: add internal pci
  Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135."
  ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
  ARM: dts: qcom: Add idle state device nodes for 8064
  ARM: dts: qcom: Add idle states device nodes for 8084
  ARM: dts: qcom: Add idle states device nodes for 8974/8074
  ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
  devicetree: bindings: Document qcom,idle-states
  devicetree: bindings: Update qcom,saw2 node bindings
  dt-bindings: Add #defines for MSM8916 clocks and resets
  arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
  arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
  arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
  arm: dts: qcom: Add LCC nodes
  arm: dts: qcom: Add TCSR support for MSM8960
  arm: dts: qcom: Add TCSR support for MSM8660
  arm: dts: qcom: Add TCSR support for IPQ8064
  ...
</content>
</entry>
<entry>
<title>ARM: 8335/1: Documentation: DT bindings: Tegra AHB: document the legacy base address</title>
<updated>2015-04-02T09:03:56Z</updated>
<author>
<name>Paul Walmsley</name>
<email>paul@pwsan.com</email>
</author>
<published>2015-03-26T07:58:31Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=38e42f121601fc0640c032871a38efa5a59cff68'/>
<id>urn:sha1:38e42f121601fc0640c032871a38efa5a59cff68</id>
<content type='text'>
Documentation: DT bindings: Tegra AHB: require the legacy base address for existing chips

Per Stephen Warren, note in the Tegra AHB DT binding documentation
that we specifically deprecate any attempt to use the IP block's
actual hardware base address, and advocate the use of the legacy
"off-by-four" address in the 'regs' property, for Tegra chips with
existing upstream Linux DT files that include a Tegra AHB node.  This
patch updates the documentation accordingly.

Changing the existing kernel DT data isn't under consideration because
Linux kernel DT data policy is to preserve compatibility between newer
DT data files and older kernels.  However, this additional step of
changing the documentation should discourage others from sending
kernel patches to try to change the legacy kernel DT data.
Furthermore, for out-of-tree software (such as bootloaders or other
operating systems) that may rely on Linux kernel DT binding
documentation as an ABI (but not the Linux kernel DT data itself),
such a change may allow future convergence with the Linux kernel DT
data without additional code changes.

Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Alexandre Courbot &lt;gnurou@gmail.com&gt;
Cc: Eduardo Valentin &lt;edubezval@gmail.com&gt;
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Cc: Kumar Gala &lt;galak@codeaurora.org&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>of: Add binding for NVIDIA Tegra ACTMON node</title>
<updated>2015-03-30T09:43:36Z</updated>
<author>
<name>Tomeu Vizoso</name>
<email>tomeu.vizoso@collabora.com</email>
</author>
<published>2015-03-17T09:36:11Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=552644687838089766457612f6dcf1c897ea09a8'/>
<id>urn:sha1:552644687838089766457612f6dcf1c897ea09a8</id>
<content type='text'>
This block gathers statistics about various counters and can be configured to
fire interrupts when thresholds are crossed.

Signed-off-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
[treding@nvidia.com: rename document, minor cleanups]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-02-17T17:27:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-02-17T17:27:54Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=878ba61aa98cbb97a513757800e77613f856a029'/>
<id>urn:sha1:878ba61aa98cbb97a513757800e77613f856a029</id>
<content type='text'>
Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...
</content>
</entry>
<entry>
<title>Documentation: DT bindings: add more Tegra chip compatible strings</title>
<updated>2015-02-04T02:37:31Z</updated>
<author>
<name>Paul Walmsley</name>
<email>paul@pwsan.com</email>
</author>
<published>2015-01-30T22:11:04Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=193c9d23a0f0b8ae0c2aeb517c953ba8aee4ceb9'/>
<id>urn:sha1:193c9d23a0f0b8ae0c2aeb517c953ba8aee4ceb9</id>
<content type='text'>
Align compatible strings for several IP blocks present on Tegra chips
with the latest doctrine from the DT maintainers:

http://marc.info/?l=devicetree&amp;m=142255654213019&amp;w=2

The primary objective here is to avoid checkpatch warnings, per:

http://marc.info/?l=linux-tegra&amp;m=142201349727836&amp;w=2

DT binding text files have been updated for the following IP blocks:

- PCIe
- SOR
- SoC timers
- AHB "gizmo"
- APB_MISC
- pinmux control
- UART
- PWM
- I2C
- SPI
- RTC
- PMC
- eFuse
- AHCI
- HDA
- XUSB_PADCTRL
- SDHCI
- SOC_THERM
- AHUB
- I2S
- EHCI
- USB PHY

N.B. The nvidia,tegra20-timer compatible string is removed from the
nvidia,tegra30-timer.txt documentation file because it's already
mentioned in the nvidia,tegra20-timer.txt documentation file.

This second version takes into account the following requests from
Rob Herring &lt;robherring2@gmail.com&gt;:

- Per-IP block patches have been combined into a single patch

- Explicit documentation about which compatible strings are actually
  matched by the driver has been removed.  In its place is implicit
  documentation that loosely follows Rob's prescribed format:

  "Must contain '"nvidia,&lt;chip&gt;-pcie", "nvidia,tegra20-pcie"' where
   &lt;chip&gt; is tegra30, tegra132, ..." [...]  "You should attempt to
   document known values of &lt;chip&gt; if you use it"

Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Alexandre Courbot &lt;gnurou@gmail.com&gt;
Cc: Dylan Reid &lt;dgreid@chromium.org&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Hans de Goede &lt;hdegoede@redhat.com&gt;
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Cc: Jingchang Lu &lt;jingchang.lu@freescale.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: Kumar Gala &lt;galak@codeaurora.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Cc: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Cc: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Cc: Sean Paul &lt;seanpaul@chromium.org&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Takashi Iwai &lt;tiwai@suse.de&gt;
Cc: Tejun Heo &lt;tj@kernel.org&gt;
Cc: "Terje Bergström" &lt;tbergstrom@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Tuomas Tynkkynen &lt;ttynkkynen@nvidia.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: dri-devel@lists.freedesktop.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Acked-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>of: Add descriptions of thermtrip properties to Tegra PMC bindings</title>
<updated>2015-01-23T14:32:00Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2015-01-06T10:52:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f58d47258131aa2d0243fc1dc78e2adc578d5de4'/>
<id>urn:sha1:f58d47258131aa2d0243fc1dc78e2adc578d5de4</id>
<content type='text'>
Hardware-triggered thermal reset requires configuring the I2C
reset procedure. This configuration is read from the device tree,
so document the relevant properties in the binding documentation.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>of: Add NVIDIA Tegra flow controller bindings</title>
<updated>2014-08-26T17:37:19Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-08-26T06:14:02Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9fc3bf5dc2cf3c8703601ad9a612b2f9eefb8a22'/>
<id>urn:sha1:9fc3bf5dc2cf3c8703601ad9a612b2f9eefb8a22</id>
<content type='text'>
Add device tree bindings for the flow controller found on NVIDIA Tegra
SoCs.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add missing clock documentation to DT bindings</title>
<updated>2013-12-11T23:41:55Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-11-06T21:00:25Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d8f64797c5ff3351a54830bba2cbc7e0b00e4613'/>
<id>urn:sha1:d8f64797c5ff3351a54830bba2cbc7e0b00e4613</id>
<content type='text'>
Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.

All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-By: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: dt: tegra: add bindings of power management configurations for PMC</title>
<updated>2013-04-03T20:31:36Z</updated>
<author>
<name>Joseph Lo</name>
<email>josephl@nvidia.com</email>
</author>
<published>2013-04-03T11:31:46Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4b51ccbc469facb7b589a71c2a4ae47d3e425d02'/>
<id>urn:sha1:4b51ccbc469facb7b589a71c2a4ae47d3e425d02</id>
<content type='text'>
The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different configurations.
The power management configurations of PMC is represented as some properties.
The system needs to define the properties when the system supports deep sleep
mode (i.e. suspend).

Cc: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Cc: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Joseph Lo &lt;josephl@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add clock source of PMC to device trees</title>
<updated>2013-04-03T20:29:56Z</updated>
<author>
<name>Joseph Lo</name>
<email>josephl@nvidia.com</email>
</author>
<published>2013-04-03T11:31:27Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7021d1220584ab1e6efd3d59da47b65674d9896a'/>
<id>urn:sha1:7021d1220584ab1e6efd3d59da47b65674d9896a</id>
<content type='text'>
Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo &lt;josephl@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
</feed>
