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<title>kernel/Documentation/devicetree/bindings/arm/omap, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2023-08-31T02:36:19Z</updated>
<entry>
<title>Merge tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2023-08-31T02:36:19Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2023-08-31T02:36:19Z</published>
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<id>urn:sha1:4a3b1007eeb26b2bb7ae4d734cc8577463325165</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "We have some patches to DTS[I] files in arm and arm64 as well, that
  were merged here as DT headers were being changed.

  The most interesting stuff is the Intel Tangier chip support and
  AMLogic C3 in my opinion.

  No core changes this time.

  Drivers:

   - Intel Tangier SoC pin control support

   - AMLogic C3 SoC pin control support

   - Texas Instruments AM654 SoC pin control support

   - Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System) pin
     control support

   - Qualcomm PMX75 and PM7550BA (Power Management) pin control support

   - Qualcomm PMC8180 and PMC8180C (Power Management) pin control
     support

   - DROP the Oxnas driver as there is not enough of community interest
     to keep carrying this ARM(11) port

  Enhancements:

   - Bias control in the MT7986 pin control driver

   - Misc device tree binding enhancements such as the Broadcom 11351
     being converted to YAML

   - New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use

   - Clean up some SPDX headers

   - Handle non-unique devicetree subnode names in two Renesas drivers"

* tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
  pinctrl: mlxbf3: Remove gpio_disable_free()
  pinctrl: use capital "OR" for multiple licenses in SPDX
  dt-bindings: pinctrl: renesas,rza2: Use 'additionalProperties' for child nodes
  pinctrl: cherryview: fix address_space_handler() argument
  pinctrl: intel: consolidate ACPI dependency
  pinctrl: tegra: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: mvebu: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: at91: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: cherryview: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pm: Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: mediatek: assign functions to configure pin bias on MT7986
  pinctrl: mediatek: fix pull_type data for MT7981
  dt-bindings: pinctrl: aspeed: Allow only defined pin mux node properties
  dt-bindings: pinctrl: Drop 'phandle' properties
  pinctrl: lynxpoint: Make use of pm_ptr()
  pinctrl: baytrail: Make use of pm_ptr()
  pinctrl: intel: Switch to use exported namespace
  pinctrl: lynxpoint: reuse common functions from pinctrl-intel
  pinctrl: cherryview: reuse common functions from pinctrl-intel
  ...
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: Update pinctrl-single to use yaml</title>
<updated>2023-08-07T13:32:22Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2023-07-21T08:26:49Z</published>
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<id>urn:sha1:677a62482bd6e584f83d0342e78735e3cd449ba4</id>
<content type='text'>
Update binding for yaml and remove the old related txt bindings. Note that
we are also adding the undocumented pinctrl-single,slew-rate property. And
we only use the first example from the old binding.

As we are mostly using a generic compatible across various SoCs, let's not
start adding matches for random pin group node naming. Let's standardize on
pin group node name ending in -pins with an optional instance number
suffix.

As a pin group may have additional pins added to it later on, let's always
use -pins rather than -pin for the gropu name.

Most of the dts files have been updated already for the pin group node
names with a few changes still pending.

Cc: Nishanth Menon &lt;nm@ti.com&gt;
Cc: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20230721082654.27036-1-tony@atomide.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: omap: Partially convert omap.txt to yaml</title>
<updated>2023-07-31T06:09:21Z</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2023-05-15T07:45:11Z</published>
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<id>urn:sha1:c5a5583ecfa02a858983a0cad710201fe0eea03f</id>
<content type='text'>
Convert omap.txt to yaml.

CC: linux-omap@vger.kernel.org
Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
[reduced to only OMAP3/4/5 and AM3, adding Epson Moverio BT-200]
Signed-off-by: Andreas Kemnade &lt;andreas@kemnade.info&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Message-ID: &lt;20230515074512.66226-2-andreas@kemnade.info&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: omap: Add clock-output-names and #clock-cells</title>
<updated>2022-04-11T13:02:12Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2022-02-03T11:23:35Z</published>
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<id>urn:sha1:26ad4834da921ffcadad3ba177dbb137d36c9248</id>
<content type='text'>
This allows us to use clock-output-names for the clock manager instance
name instead of relying on non-standard node names.

Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Tero Kristo &lt;kristo@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Message-Id: &lt;20220203112337.19821-1-tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: Fix timer regression for beagleboard revision c</title>
<updated>2021-12-17T12:15:43Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2021-11-25T14:48:34Z</published>
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<id>urn:sha1:23885389dbbbbc698986e77a45c1fc44a6e3632e</id>
<content type='text'>
Commit e428e250fde6 ("ARM: dts: Configure system timers for omap3")
caused a timer regression for beagleboard revision c where the system
clockevent stops working if omap3isp module is unloaded.

Turns out we still have beagleboard revisions a-b4 capacitor c70 quirks
applied that limit the usable timers for no good reason. This also affects
the power management as we use the system clock instead of the 32k clock
source.

Let's fix the issue by adding a new omap3-beagle-ab4.dts for the old timer
quirks. This allows us to remove the timer quirks for later beagleboard
revisions. We also need to update the related timer quirk check for the
correct compatible property.

Fixes: e428e250fde6 ("ARM: dts: Configure system timers for omap3")
Cc: linux-kernel@vger.kernel.org
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Reported-by: Jarkko Nikula &lt;jarkko.nikula@bitmer.com&gt;
Tested-by: Jarkko Nikula &lt;jarkko.nikula@bitmer.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: omap: Update PRM binding for genpd</title>
<updated>2020-08-18T07:40:02Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2020-07-02T15:45:08Z</published>
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<id>urn:sha1:de104a292d07ef63803bc5c496e7cac54d8c16cc</id>
<content type='text'>
The PRM (Power and Reset Module) has a register to enable and disable
the related power domain, so let's update the binding for that.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Santosh Shilimkar &lt;ssantosh@kernel.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>docs: dt: fix several broken references due to renames</title>
<updated>2020-02-24T18:12:44Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab+huawei@kernel.org</email>
</author>
<published>2020-02-22T09:00:02Z</published>
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<id>urn:sha1:54b3719d82e0816271e35579a9967b8a3b42296d</id>
<content type='text'>
Several DT references got broken due to txt-&gt;yaml conversion.

Those are auto-fixed by running:

	scripts/documentation-file-ref-check --fix

Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;
Acked-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Reviewed-by: Dan Murphy &lt;dmurphy@ti.com&gt;
Reviewed-by: Amit Kucheria &lt;amit.kucheria@linaro.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2019-12-05T19:43:31Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-12-05T19:43:31Z</published>
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<id>urn:sha1:ec939e4c94bd3ef2fd4f34c15f8aaf79bd0c5ee1</id>
<content type='text'>
Pull ARM SoC driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - A larger set of work on Tegra 2/3 around memory controller and
     regulator features, some fuse cleanups, etc..

   - MMP platform drivers, in particular for USB PHY, and other smaller
     additions.

   - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
     and ASV (adaptive voltage), allowing the platform to run at more
     optimal operating points.

   - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas

   - Clock/reset control driver for TI/OMAP

   - Meson-A1 reset controller support

   - Qualcomm sdm845 and sda845 SoC IDs for socinfo"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
  firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
  soc: fsl: add RCPM driver
  dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
  memory: tegra: Consolidate registers definition into common header
  memory: tegra: Ensure timing control debug features are disabled
  memory: tegra: Introduce Tegra30 EMC driver
  memory: tegra: Do not handle error from wait_for_completion_timeout()
  memory: tegra: Increase handshake timeout on Tegra20
  memory: tegra: Print a brief info message about EMC timings
  memory: tegra: Pre-configure debug register on Tegra20
  memory: tegra: Include io.h instead of iopoll.h
  memory: tegra: Adapt for Tegra20 clock driver changes
  memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
  memory: tegra: Add gr2d and gr3d to DRM IOMMU group
  memory: tegra: Set DMA mask based on supported address bits
  soc: at91: Add Atmel SFR SN (Serial Number) support
  memory: atmel-ebi: switch to SPDX license identifiers
  memory: atmel-ebi: move NUM_CS definition inside EBI driver
  soc: mediatek: Refactor bus protection control
  soc: mediatek: Refactor sram control
  ...
</content>
</entry>
<entry>
<title>DTS: bindings: omap: update bindings documentation</title>
<updated>2019-10-10T10:41:50Z</updated>
<author>
<name>H. Nikolaus Schaller</name>
<email>hns@goldelico.com</email>
</author>
<published>2019-09-11T17:47:09Z</published>
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<id>urn:sha1:b552904a73a3bb9a22b8b1db652a6f9285d535f3</id>
<content type='text'>
* clarify that we now need either "ti,omap3430" or "ti,omap3630" or "ti,am3517" for omap3 chips
* clarify that "ti,omap3" has no default
* clarify that AM33x is not an "ti,omap3"
* clarify that the list of boards is incomplete
* remove some "ti,am33xx", "ti,omap3"
* add some missing "ti,omap4"

Signed-off-by: H. Nikolaus Schaller &lt;hns@goldelico.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Tested-by: Adam Ford &lt;aford173@gmail.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: omap: add new binding for PRM instances</title>
<updated>2019-10-09T15:55:36Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2019-10-09T15:55:36Z</published>
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<id>urn:sha1:95ec5442715a16e3df91aa17d527f8f07588f5d2</id>
<content type='text'>
Add new binding for OMAP PRM (Power and Reset Manager) instances. Each
of these will act as a power domain controller and potentially as a reset
provider.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@oracle.com&gt;
</content>
</entry>
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