<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/Documentation/ABI/testing/debugfs-dwc-pcie, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2025-03-06T08:55:54Z</updated>
<entry>
<title>PCI: dwc: Add debugfs property to provide LTSSM status of the PCIe link</title>
<updated>2025-03-06T08:55:54Z</updated>
<author>
<name>Hans Zhang</name>
<email>18255117159@163.com</email>
</author>
<published>2025-02-23T14:18:48Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f0f3044d2246495e01871212fc7ec5e206555338'/>
<id>urn:sha1:f0f3044d2246495e01871212fc7ec5e206555338</id>
<content type='text'>
Add the debugfs property to provide a view of the current link's LTSSM
status from the Root Port device.

Signed-off-by: Hans Zhang &lt;18255117159@163.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Tested-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Tested-by: Hrishikesh Deleep &lt;hrishikesh.d@samsung.com&gt;
Link: https://lore.kernel.org/r/20250223141848.231232-1-18255117159@163.com
[kwilczynski: commit log, refactor dw_ltssm_sts_string() to avoid
compilation errors on platforms that do not set CONFIG_PCIE_DW_HOST]
Signed-off-by: Krzysztof Wilczyński &lt;kwilczynski@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: dwc: Add debugfs based Statistical Counter support for DWC</title>
<updated>2025-03-06T08:55:53Z</updated>
<author>
<name>Shradha Todi</name>
<email>shradha.t@samsung.com</email>
</author>
<published>2025-02-21T13:15:48Z</published>
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<id>urn:sha1:27491ac2ccd7e111a9c058e7654d372cbfcdad4c</id>
<content type='text'>
Add support to provide Statistical Counter interface to userspace.

This set of debug registers are part of the RAS DES feature present in
DesignWare PCIe controllers.

Co-developed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Shradha Todi &lt;shradha.t@samsung.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Tested-by: Hrishikesh Deleep &lt;hrishikesh.d@samsung.com&gt;
Link: https://lore.kernel.org/r/20250221131548.59616-6-shradha.t@samsung.com
[kwilczynski: commit log, tidy up code comments, update documentation,
squashed patch that checks if the event counter is supported from
https://lore.kernel.org/linux-pci/20250225171239.19574-3-manivannan.sadhasivam@linaro.org]
Signed-off-by: Krzysztof Wilczyński &lt;kwilczynski@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: dwc: Add debugfs based Error Injection support for DWC</title>
<updated>2025-03-06T08:55:53Z</updated>
<author>
<name>Shradha Todi</name>
<email>shradha.t@samsung.com</email>
</author>
<published>2025-02-21T13:15:47Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d20ee8e2dbd6c41a1e48ac38c352689b1d3cbbe4'/>
<id>urn:sha1:d20ee8e2dbd6c41a1e48ac38c352689b1d3cbbe4</id>
<content type='text'>
Add support to provide Error Injection interface to userspace.

This set of debug registers are part of the RAS DES feature present in
DesignWare PCIe controllers.

Signed-off-by: Shradha Todi &lt;shradha.t@samsung.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Fan Ni &lt;fan.ni@samsung.com&gt;
Tested-by: Hrishikesh Deleep &lt;hrishikesh.d@samsung.com&gt;
Link: https://lore.kernel.org/r/20250221131548.59616-5-shradha.t@samsung.com
[kwilczynski: commit log, tidy up code comments, update documentation,
change debugfs property name from "duplicate_dllp" to "duplicate_tlp"]
Signed-off-by: Krzysztof Wilczyński &lt;kwilczynski@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: dwc: Add debugfs based Silicon Debug support for DWC</title>
<updated>2025-03-06T08:55:47Z</updated>
<author>
<name>Shradha Todi</name>
<email>shradha.t@samsung.com</email>
</author>
<published>2025-02-21T13:15:46Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=4fbfa17f9a075593281034f566ca79cbf4930c82'/>
<id>urn:sha1:4fbfa17f9a075593281034f566ca79cbf4930c82</id>
<content type='text'>
Add support to provide Silicon Debug interface to userspace.

This set of debug registers are part of the RAS DES feature present in
DesignWare PCIe controllers.

Co-developed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Shradha Todi &lt;shradha.t@samsung.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Fan Ni &lt;fan.ni@samsung.com&gt;
Tested-by: Hrishikesh Deleep &lt;hrishikesh.d@samsung.com&gt;
Link: https://lore.kernel.org/r/20250221131548.59616-4-shradha.t@samsung.com
[kwilczynski: commit log, tidy up Kconfig and drop "default y", tidy up
code comments, squashed patch that fixes a NULL pointer dereference when
debugfs is already unavailable during clean-up from
https://lore.kernel.org/linux-pci/20250225171239.19574-2-manivannan.sadhasivam@linaro.org,
refactor dwc_pcie_debugfs_init() to not return errors, squashed patch that
changes how lack of the RAS DES capability is handled from
https://lore.kernel.org/linux-pci/20250304151814.6xu7cbpwpqrvcad5@thinkpad]
Signed-off-by: Krzysztof Wilczyński &lt;kwilczynski@kernel.org&gt;
</content>
</entry>
</feed>
