kernel, branch linux-2.6.17.y

Linux 2.6.17.14

2006-10-13T18:55:04Z

Input: logips2pp - fix button mapping for MX300

2006-10-13T18:50:11Z

MX300 does not have an EXTRA_BTN - it is a simple wheel mouse with an additional task-switcher button, which is reported as side button (and not task button). Signed-off-by: Daniel Drake Signed-off-by: Dmitry Torokhov Signed-off-by: Greg Kroah-Hartman

ahci: do not fail softreset if PHY reports no device

2006-10-13T18:50:11Z

All softreset methods are responsible for detecting device presence and succeed softreset in such cases. AHCI didn't use to check for device presence before proceeding with softreset and this caused unnecessary reset retrials during probing. This patch adds presence detection to AHCI softreset. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik Cc: Daniel Drake Signed-off-by: Greg Kroah-Hartman

MMC: Always use a sector size of 512 bytes

2006-10-13T18:50:11Z

Both MMC and SD specifications specify (although a bit unclearly in the MMC case) that a sector size of 512 bytes must always be supported by the card. Cards can report larger "native" size than this, and cards >= 2 GB even must do so. Most other readers use 512 bytes even for these cards. We should do the same to be compatible. Signed-off-by: Pierre Ossman Cc: Daniel Drake Signed-off-by: Greg Kroah-Hartman

Add PIIX4 APCI quirk for the 440MX chipset too

2006-10-13T18:50:11Z

This is confirmed to fix a hang due to PCI resource conflicts with setting up the Cardbus bridge on old laptops with the 440MX chipsets. Original report by Alessio Sangalli, lspci debugging help by Pekka Enberg, and trial patch suggested by Daniel Ritz: "From the docs available i would _guess_ this thing is really similar to the 82443BX/82371AB combination. at least the SMBus base address register is hidden at the very same place (32bit at 0x90 in function 3 of the "south" brigde)" The dang thing is largely undocumented, but the patch was corroborated by Asit Mallick: "I am trying to find the register information. 440MX is an integration of 440BX north-bridge without AGP and PIIX4E (82371EB). PIIX4 quirk should cover the ACPI and SMBus related I/O registers." and verified to fix the problem by Alessio. Cc: Daniel Ritz Cc: Asit Mallick Cc: Pekka Enberg Cc: Ivan Kokshaysky Cc: Dmitry Torokhov Tested-by: Alessio Sangalli Signed-off-by: Linus Torvalds Signed-off-by: Greg Kroah-Hartman

xirc2ps_cs: Cannot reset card in atomic context

2006-10-13T18:50:11Z

I am using a Xircom CEM33 pcmcia NIC which has occasional hardware problems. If the netdev watchdog detects a transmit timeout, do_reset is called which msleeps - this is illegal in atomic context. This patch schedules the timeout handling as a workqueue item. Signed-off-by: Daniel Drake Signed-off-by: Jeff Garzik Signed-off-by: Greg Kroah-Hartman

PKT_SCHED: cls_basic: Use unsigned int when generating handle

2006-10-13T18:50:11Z

Prevents filters from being added if the first generated handle already exists. Signed-off-by: Kim Nordlund Signed-off-by: Thomas Graf Signed-off-by: Greg Kroah-Hartman

Fix sparc64 ramdisk handling

2006-10-13T18:50:11Z

[SPARC64]: Kill bogus check from bootmem_init(). There is an ancient and totally incorrect sanity check being done on the ramdisk location. The check assumes that the kernel is always loaded to physical address zero, which is wrong. It was trying to validate the ramdisk value by saying that if it fell within the kernel image address range it must be wrong. Anyways, kill this because it actually creates problems. The 'ramdisk_image' should always be adjusted down by KERNBASE. SILO can easily put the ramdisk in a location which causes this test to trigger, breaking things. [ Based almost entirely upon a patch from Ben Collins. ] Signed-off-by: David S. Miller Signed-off-by: Greg Kroah-Hartman

SPARC64: Fix serious bug in sched_clock() on sparc64

2006-10-13T18:50:10Z

[SPARC64]: Fix sched_clock() wrapping every ~17 seconds. Unfortunately, sparc64 doesn't have an easy way to do a "64 X 64 --> 128" bit multiply like PowerPC and IA64 do. We were doing a "64 X 64 --> 64" bit multiple which causes overflow very quickly with a 30-bit quotient shift. So use a quotientshift count of 10 instead of 30, just like x86 and ARM do. This also fixes the wrapping of printk timestamp values every ~17 seconds. Signed-off-by: David S. Miller Signed-off-by: Greg Kroah-Hartman

DVB: cx24123: fix PLL divisor setup

2006-10-13T18:50:10Z

The cx24109 datasheet says: "NOTE: if A=0, then N=N+1" The current code is the result of a misinterpretation of the datasheet to mean exactly the opposite of the requirement -- The actual value of N is 1 greater than the value written when A is 0, so 1 needs to be *subtracted* from it to compensate. Signed-off-by: Yeasah Pell Signed-off-by: Steven Toth Signed-off-by: Michael Krufky Signed-off-by: Greg Kroah-Hartman