2026-02-04 12:52:42 +01:00
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#include "CPU.h"
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#include <stdexcept>
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#include <iostream>
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#include <iomanip>
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2026-02-05 14:57:23 +01:00
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#include <bitset>
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2026-02-04 12:52:42 +01:00
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#include <stdlib.h>
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#include <array>
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2026-02-04 22:28:36 +01:00
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#include <cassert>
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2026-02-04 12:52:42 +01:00
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2026-02-04 22:28:36 +01:00
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CPU::CPU(std::shared_ptr<Bus> bus) : m_Bus(bus), m_IsHalted(false), m_Context({m_Instruction, m_InstructionPointer, m_Flags, m_Registers, m_Bus, m_IsHalted}) {
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2026-02-04 12:52:42 +01:00
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m_InstructionPointer = 0x00008000;
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2026-02-05 14:57:23 +01:00
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for(int i = 0; i < 8; i++)
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2026-02-04 12:52:42 +01:00
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{
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m_Registers[i] = 0;
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}
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2026-02-05 14:57:23 +01:00
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for(int i = 0; i < 8; i++)
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{
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m_SegmentRegisters[i] = 0;
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}
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2026-02-04 12:52:42 +01:00
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}
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2026-02-04 22:28:36 +01:00
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void CPU::Step() {
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FetchDecode();
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Execute();
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}
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2026-02-05 14:57:23 +01:00
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void CPU::Dump() {
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std::cout << "--TRACE-- ";
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std::cout << std::endl;
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for(uint8_t i = 0; i < 8; i++)
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{
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std::cout << x86::Register2Str((x86::Register)i) << ": " << m_Registers[i] << " | ";
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}
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std::cout << std::endl;
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std::bitset<32> flags(m_Flags);
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std::cout << "IP: " << std::hex << m_InstructionPointer << " | FLAGS: " << flags;
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std::cout << std::endl;
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}
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2026-02-04 22:28:36 +01:00
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void CPU::FetchDecode() {
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uint8_t opcode_raw = m_Bus->AccessX<uint8_t>(m_InstructionPointer);
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Opcode opcode = static_cast<Opcode>(opcode_raw);
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2026-02-04 22:28:36 +01:00
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switch(opcode_raw) {
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2026-02-05 00:42:25 +01:00
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case Opcode::MOV_R32_IMM32 ... 0xBF: // 0xB8 to 0xBF
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m_Instruction.m_Opcode = Opcode::MOV_R32_IMM32;
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m_Instruction.m_Operand1 = opcode_raw - 0xB8;
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m_Instruction.m_Operand2 = m_Bus->AccessX<uint32_t>(m_InstructionPointer + 1);
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m_Instruction.m_Length = 5;
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break;
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case Opcode::NOP:
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case Opcode::HLT:
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m_Instruction.m_Opcode = opcode;
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m_Instruction.m_Length = 1;
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break;
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case Opcode::ADD_RM32_R32:
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m_Instruction.m_Opcode = opcode;
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m_Instruction.optional.m_ModRM = x86::process_modrm(m_Bus->AccessX<uint8_t>(m_InstructionPointer + 1));
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m_Instruction.m_Length = 2;
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FetchModRMFields();
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break;
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case Opcode::MOV_RM32_R32:
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m_Instruction.m_Opcode = opcode;
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m_Instruction.optional.m_ModRM = x86::process_modrm(m_Bus->AccessX<uint8_t>(m_InstructionPointer + 1));
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m_Instruction.m_Length = 2;
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FetchModRMFields();
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break;
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}
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m_InstructionPointer += m_Instruction.m_Length;
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}
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void CPU::Execute() {
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uint8_t opcode_value = static_cast<uint8_t>(m_Instruction.m_Opcode);
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auto& exec_table = GetExecutorTable();
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if(exec_table[opcode_value])
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{
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exec_table[opcode_value](m_Context);
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Dump();
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return;
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}
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throw std::runtime_error("Opcode not found!");
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}
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void CPU::FetchModRMFields() {
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assert(m_Instruction.m_Length != 0); // FetchDecode() must set m_Length before calling FetchModRMFields()
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x86::ModRMState state = m_Instruction.optional.m_ModRM.m_State;
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switch(state) {
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case x86::ModRMState::LR:
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case x86::ModRMState::R:
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break;
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case x86::ModRMState::DISP32:
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case x86::ModRMState::LR_DISP32:
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m_Instruction.m_Operand1 = m_Bus->AccessX<uint32_t>(m_InstructionPointer + m_Instruction.m_Length);
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m_Instruction.m_Length += 4;
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break;
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case x86::ModRMState::LR_DISP8:
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m_Instruction.m_Operand1 = m_Bus->AccessX<uint8_t>(m_InstructionPointer + m_Instruction.m_Length);
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m_Instruction.m_Length += 1;
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break;
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default:
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throw std::runtime_error("Instruction could not be modified according to the modrm field!");
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}
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}
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